mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-08 10:13:56 -06:00
Refactor i.MX7 processor code
* Add Addr and size definition for all i.MX7 devices in i.MX7 header file. * Use those newly defined named constants whenever possible. * Standardize the way we init a familly of unimplemented devices - SAI - PWM - CAN * Add/rework few comments Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 59e195d33e4d486a8d131392acd46633c8c10ed7.1692964892.git.jcd@tribudubois.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Jean-Christophe Dubois
Peter Maydell
parent
f6020845e2
commit
45b8b34dfa
2 changed files with 335 additions and 125 deletions
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@ -36,6 +36,9 @@ static void fsl_imx7_init(Object *obj)
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char name[NAME_SIZE];
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int i;
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/*
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* CPUs
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*/
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for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX7_NUM_CPUS); i++) {
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snprintf(name, NAME_SIZE, "cpu%d", i);
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object_initialize_child(obj, name, &s->cpu[i],
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@ -49,7 +52,7 @@ static void fsl_imx7_init(Object *obj)
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TYPE_A15MPCORE_PRIV);
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/*
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* GPIOs 1 to 7
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* GPIOs
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*/
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for (i = 0; i < FSL_IMX7_NUM_GPIOS; i++) {
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snprintf(name, NAME_SIZE, "gpio%d", i);
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@ -57,7 +60,7 @@ static void fsl_imx7_init(Object *obj)
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}
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/*
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* GPT1, 2, 3, 4
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* GPTs
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*/
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for (i = 0; i < FSL_IMX7_NUM_GPTS; i++) {
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snprintf(name, NAME_SIZE, "gpt%d", i);
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@ -79,19 +82,24 @@ static void fsl_imx7_init(Object *obj)
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*/
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object_initialize_child(obj, "gpcv2", &s->gpcv2, TYPE_IMX_GPCV2);
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/*
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* ECSPIs
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*/
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for (i = 0; i < FSL_IMX7_NUM_ECSPIS; i++) {
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snprintf(name, NAME_SIZE, "spi%d", i + 1);
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object_initialize_child(obj, name, &s->spi[i], TYPE_IMX_SPI);
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}
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/*
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* I2Cs
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*/
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for (i = 0; i < FSL_IMX7_NUM_I2CS; i++) {
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snprintf(name, NAME_SIZE, "i2c%d", i + 1);
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object_initialize_child(obj, name, &s->i2c[i], TYPE_IMX_I2C);
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}
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/*
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* UART
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* UARTs
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*/
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for (i = 0; i < FSL_IMX7_NUM_UARTS; i++) {
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snprintf(name, NAME_SIZE, "uart%d", i);
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@ -99,7 +107,7 @@ static void fsl_imx7_init(Object *obj)
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}
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/*
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* Ethernet
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* Ethernets
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*/
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for (i = 0; i < FSL_IMX7_NUM_ETHS; i++) {
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snprintf(name, NAME_SIZE, "eth%d", i);
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@ -107,7 +115,7 @@ static void fsl_imx7_init(Object *obj)
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}
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/*
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* SDHCI
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* SDHCIs
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*/
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for (i = 0; i < FSL_IMX7_NUM_USDHCS; i++) {
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snprintf(name, NAME_SIZE, "usdhc%d", i);
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@ -120,7 +128,7 @@ static void fsl_imx7_init(Object *obj)
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object_initialize_child(obj, "snvs", &s->snvs, TYPE_IMX7_SNVS);
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/*
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* Watchdog
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* Watchdogs
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*/
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for (i = 0; i < FSL_IMX7_NUM_WDTS; i++) {
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snprintf(name, NAME_SIZE, "wdt%d", i);
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@ -132,8 +140,14 @@ static void fsl_imx7_init(Object *obj)
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*/
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object_initialize_child(obj, "gpr", &s->gpr, TYPE_IMX7_GPR);
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/*
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* PCIE
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*/
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object_initialize_child(obj, "pcie", &s->pcie, TYPE_DESIGNWARE_PCIE_HOST);
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/*
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* USBs
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*/
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for (i = 0; i < FSL_IMX7_NUM_USBS; i++) {
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snprintf(name, NAME_SIZE, "usb%d", i);
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object_initialize_child(obj, name, &s->usb[i], TYPE_CHIPIDEA);
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@ -156,6 +170,9 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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return;
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}
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/*
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* CPUs
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*/
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for (i = 0; i < smp_cpus; i++) {
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o = OBJECT(&s->cpu[i]);
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@ -206,10 +223,10 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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* A7MPCORE DAP
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*/
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create_unimplemented_device("a7mpcore-dap", FSL_IMX7_A7MPCORE_DAP_ADDR,
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0x100000);
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FSL_IMX7_A7MPCORE_DAP_SIZE);
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/*
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* GPT1, 2, 3, 4
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* GPTs
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*/
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for (i = 0; i < FSL_IMX7_NUM_GPTS; i++) {
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static const hwaddr FSL_IMX7_GPTn_ADDR[FSL_IMX7_NUM_GPTS] = {
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@ -234,6 +251,9 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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FSL_IMX7_GPTn_IRQ[i]));
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}
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/*
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* GPIOs
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*/
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for (i = 0; i < FSL_IMX7_NUM_GPIOS; i++) {
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static const hwaddr FSL_IMX7_GPIOn_ADDR[FSL_IMX7_NUM_GPIOS] = {
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FSL_IMX7_GPIO1_ADDR,
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@ -281,16 +301,10 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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/*
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* IOMUXC and IOMUXC_LPSR
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*/
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for (i = 0; i < FSL_IMX7_NUM_IOMUXCS; i++) {
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static const hwaddr FSL_IMX7_IOMUXCn_ADDR[FSL_IMX7_NUM_IOMUXCS] = {
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FSL_IMX7_IOMUXC_ADDR,
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FSL_IMX7_IOMUXC_LPSR_ADDR,
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};
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snprintf(name, NAME_SIZE, "iomuxc%d", i);
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create_unimplemented_device(name, FSL_IMX7_IOMUXCn_ADDR[i],
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FSL_IMX7_IOMUXCn_SIZE);
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}
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create_unimplemented_device("iomuxc", FSL_IMX7_IOMUXC_ADDR,
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FSL_IMX7_IOMUXC_SIZE);
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create_unimplemented_device("iomuxc_lspr", FSL_IMX7_IOMUXC_LPSR_ADDR,
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FSL_IMX7_IOMUXC_LPSR_SIZE);
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/*
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* CCM
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@ -310,7 +324,9 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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sysbus_realize(SYS_BUS_DEVICE(&s->gpcv2), &error_abort);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpcv2), 0, FSL_IMX7_GPC_ADDR);
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/* Initialize all ECSPI */
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/*
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* ECSPIs
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*/
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for (i = 0; i < FSL_IMX7_NUM_ECSPIS; i++) {
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static const hwaddr FSL_IMX7_SPIn_ADDR[FSL_IMX7_NUM_ECSPIS] = {
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FSL_IMX7_ECSPI1_ADDR,
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@ -335,6 +351,9 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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FSL_IMX7_SPIn_IRQ[i]));
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}
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/*
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* I2Cs
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*/
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for (i = 0; i < FSL_IMX7_NUM_I2CS; i++) {
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static const hwaddr FSL_IMX7_I2Cn_ADDR[FSL_IMX7_NUM_I2CS] = {
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FSL_IMX7_I2C1_ADDR,
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@ -359,7 +378,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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}
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/*
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* UART
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* UARTs
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*/
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for (i = 0; i < FSL_IMX7_NUM_UARTS; i++) {
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static const hwaddr FSL_IMX7_UARTn_ADDR[FSL_IMX7_NUM_UARTS] = {
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@ -394,7 +413,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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}
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/*
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* Ethernet
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* Ethernets
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*
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* We must use two loops since phy_connected affects the other interface
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* and we have to set all properties before calling sysbus_realize().
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@ -434,7 +453,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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}
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/*
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* USDHC
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* USDHCs
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*/
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for (i = 0; i < FSL_IMX7_NUM_USDHCS; i++) {
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static const hwaddr FSL_IMX7_USDHCn_ADDR[FSL_IMX7_NUM_USDHCS] = {
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@ -464,7 +483,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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* SNVS
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*/
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sysbus_realize(SYS_BUS_DEVICE(&s->snvs), &error_abort);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->snvs), 0, FSL_IMX7_SNVS_ADDR);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->snvs), 0, FSL_IMX7_SNVS_HP_ADDR);
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/*
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* SRC
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@ -472,7 +491,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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create_unimplemented_device("src", FSL_IMX7_SRC_ADDR, FSL_IMX7_SRC_SIZE);
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/*
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* Watchdog
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* Watchdogs
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*/
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for (i = 0; i < FSL_IMX7_NUM_WDTS; i++) {
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static const hwaddr FSL_IMX7_WDOGn_ADDR[FSL_IMX7_NUM_WDTS] = {
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@ -509,25 +528,49 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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create_unimplemented_device("caam", FSL_IMX7_CAAM_ADDR, FSL_IMX7_CAAM_SIZE);
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/*
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* PWM
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* PWMs
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*/
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create_unimplemented_device("pwm1", FSL_IMX7_PWM1_ADDR, FSL_IMX7_PWMn_SIZE);
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create_unimplemented_device("pwm2", FSL_IMX7_PWM2_ADDR, FSL_IMX7_PWMn_SIZE);
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create_unimplemented_device("pwm3", FSL_IMX7_PWM3_ADDR, FSL_IMX7_PWMn_SIZE);
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create_unimplemented_device("pwm4", FSL_IMX7_PWM4_ADDR, FSL_IMX7_PWMn_SIZE);
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for (i = 0; i < FSL_IMX7_NUM_PWMS; i++) {
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static const hwaddr FSL_IMX7_PWMn_ADDR[FSL_IMX7_NUM_PWMS] = {
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FSL_IMX7_PWM1_ADDR,
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FSL_IMX7_PWM2_ADDR,
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FSL_IMX7_PWM3_ADDR,
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FSL_IMX7_PWM4_ADDR,
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};
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snprintf(name, NAME_SIZE, "pwm%d", i);
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create_unimplemented_device(name, FSL_IMX7_PWMn_ADDR[i],
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FSL_IMX7_PWMn_SIZE);
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}
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/*
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* CAN
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* CANs
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*/
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create_unimplemented_device("can1", FSL_IMX7_CAN1_ADDR, FSL_IMX7_CANn_SIZE);
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create_unimplemented_device("can2", FSL_IMX7_CAN2_ADDR, FSL_IMX7_CANn_SIZE);
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for (i = 0; i < FSL_IMX7_NUM_CANS; i++) {
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static const hwaddr FSL_IMX7_CANn_ADDR[FSL_IMX7_NUM_CANS] = {
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FSL_IMX7_CAN1_ADDR,
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FSL_IMX7_CAN2_ADDR,
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};
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snprintf(name, NAME_SIZE, "can%d", i);
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create_unimplemented_device(name, FSL_IMX7_CANn_ADDR[i],
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FSL_IMX7_CANn_SIZE);
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}
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/*
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* SAI (Audio SSI (Synchronous Serial Interface))
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* SAIs (Audio SSI (Synchronous Serial Interface))
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*/
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create_unimplemented_device("sai1", FSL_IMX7_SAI1_ADDR, FSL_IMX7_SAIn_SIZE);
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create_unimplemented_device("sai2", FSL_IMX7_SAI2_ADDR, FSL_IMX7_SAIn_SIZE);
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create_unimplemented_device("sai2", FSL_IMX7_SAI3_ADDR, FSL_IMX7_SAIn_SIZE);
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for (i = 0; i < FSL_IMX7_NUM_SAIS; i++) {
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static const hwaddr FSL_IMX7_SAIn_ADDR[FSL_IMX7_NUM_SAIS] = {
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FSL_IMX7_SAI1_ADDR,
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FSL_IMX7_SAI2_ADDR,
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FSL_IMX7_SAI3_ADDR,
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};
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snprintf(name, NAME_SIZE, "sai%d", i);
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create_unimplemented_device(name, FSL_IMX7_SAIn_ADDR[i],
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FSL_IMX7_SAIn_SIZE);
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}
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/*
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* OCOTP
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@ -535,9 +578,15 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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create_unimplemented_device("ocotp", FSL_IMX7_OCOTP_ADDR,
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FSL_IMX7_OCOTP_SIZE);
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/*
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* GPR
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*/
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sysbus_realize(SYS_BUS_DEVICE(&s->gpr), &error_abort);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpr), 0, FSL_IMX7_GPR_ADDR);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpr), 0, FSL_IMX7_IOMUXC_GPR_ADDR);
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/*
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* PCIE
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*/
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sysbus_realize(SYS_BUS_DEVICE(&s->pcie), &error_abort);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->pcie), 0, FSL_IMX7_PCIE_REG_ADDR);
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@ -550,7 +599,9 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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irq = qdev_get_gpio_in(DEVICE(&s->a7mpcore), FSL_IMX7_PCI_INTD_IRQ);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->pcie), 3, irq);
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/*
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* USBs
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*/
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for (i = 0; i < FSL_IMX7_NUM_USBS; i++) {
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static const hwaddr FSL_IMX7_USBMISCn_ADDR[FSL_IMX7_NUM_USBS] = {
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FSL_IMX7_USBMISC1_ADDR,
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@ -612,6 +663,7 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
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*/
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create_unimplemented_device("pcie-phy", FSL_IMX7_PCIE_PHY_ADDR,
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FSL_IMX7_PCIE_PHY_SIZE);
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}
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static Property fsl_imx7_properties[] = {
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