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s390x: Fix spelling errors

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Fix typos (discovered with the 'codespell' utility).
Note: Though "migrateable" still seems to be a valid spelling, we change
it to "migratable" since this is the way more common spelling here.

Message-Id: <20221111182828.282251-1-thuth@redhat.com>
Reviewed-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Thomas Huth 2022-11-11 19:17:33 +01:00
parent 2c8311241d
commit 44ee69ea16
13 changed files with 19 additions and 19 deletions
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4
target/s390x/cpu_models.h
View file

@ -24,13 +24,13 @@ struct S390CPUDef {
uint8_t gen; /* hw generation identification */
uint16_t type; /* cpu type identification */
uint8_t ec_ga; /* EC GA version (on which also the BC is based) */
uint8_t mha_pow; /* Maximum Host Adress Power, mha = 2^pow-1 */
uint8_t mha_pow; /* maximum host address power, mha = 2^pow-1 */
uint32_t hmfai; /* hypervisor-managed facilities */
/* base/min features, must never be changed between QEMU versions */
S390FeatBitmap base_feat;
/* used to init base_feat from generated data */
S390FeatInit base_init;
/* deafault features, QEMU version specific */
/* default features, QEMU version specific */
S390FeatBitmap default_feat;
/* used to init default_feat from generated data */
S390FeatInit default_init;

2
target/s390x/ioinst.c
View file

@ -285,7 +285,7 @@ void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, uint32_t ipb,
/*
* As operand exceptions have a lower priority than access exceptions,
* we check whether the memory area is writable (injecting the
* access execption if it is not) first.
* access exception if it is not) first.
*/
if (!s390_cpu_virt_mem_check_write(cpu, addr, ar, sizeof(schib))) {
s390_program_interrupt(env, PGM_OPERAND, ra);

2
target/s390x/tcg/excp_helper.c
View file

@ -553,7 +553,7 @@ try_deliver:
/* don't trigger a cpu_loop_exit(), use an interrupt instead */
cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HALT);
} else if (cs->halted) {
/* unhalt if we had a WAIT PSW somehwere in our injection chain */
/* unhalt if we had a WAIT PSW somewhere in our injection chain */
s390_cpu_unhalt(cpu);
}
}

2
target/s390x/tcg/fpu_helper.c
View file

@ -89,7 +89,7 @@ static void handle_exceptions(CPUS390XState *env, bool XxC, uintptr_t retaddr)
/*
* invalid/divbyzero cannot coexist with other conditions.
* overflow/underflow however can coexist with inexact, we have to
* handle it separatly.
* handle it separately.
*/
if (s390_exc & ~S390_IEEE_MASK_INEXACT) {
if (s390_exc & ~S390_IEEE_MASK_INEXACT & env->fpc >> 24) {

2
target/s390x/tcg/misc_helper.c
View file

@ -333,7 +333,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint64_t r0, uint64_t r1)
/* same as machine type number in STORE CPU ID, but in EBCDIC */
snprintf(type, ARRAY_SIZE(type), "%X", cpu->model->def->type);
ebcdic_put(sysib.sysib_111.type, type, 4);
/* model number (not stored in STORE CPU ID for z/Architecure) */
/* model number (not stored in STORE CPU ID for z/Architecture) */
ebcdic_put(sysib.sysib_111.model, "QEMU ", 16);
ebcdic_put(sysib.sysib_111.sequence, "QEMU ", 16);
ebcdic_put(sysib.sysib_111.plant, "QEMU", 4);

4
target/s390x/tcg/translate.c
View file

@ -435,7 +435,7 @@ static void gen_program_exception(DisasContext *s, int code)
{
TCGv_i32 tmp;
/* Remember what pgm exeption this was. */
/* Remember what pgm exception this was. */
tmp = tcg_const_i32(code);
tcg_gen_st_i32(tmp, cpu_env, offsetof(CPUS390XState, int_pgm_code));
tcg_temp_free_i32(tmp);
@ -491,7 +491,7 @@ static TCGv_i64 get_address(DisasContext *s, int x2, int b2, int d2)
/*
* Note that d2 is limited to 20 bits, signed. If we crop negative
* displacements early we create larger immedate addends.
* displacements early we create larger immediate addends.
*/
if (b2 && x2) {
tcg_gen_add_i64(tmp, regs[b2], regs[x2]);

6
target/s390x/tcg/translate_vx.c.inc
View file

@ -960,7 +960,7 @@ static DisasJumpType op_vpk(DisasContext *s, DisasOps *o)
}
break;
case 0x94:
/* If sources and destination dont't overlap -> fast path */
/* If sources and destination don't overlap -> fast path */
if (v1 != v2 && v1 != v3) {
const uint8_t src_es = get_field(s, m4);
const uint8_t dst_es = src_es - 1;
@ -2075,7 +2075,7 @@ static DisasJumpType op_vmsl(DisasContext *s, DisasOps *o)
l2 = tcg_temp_new_i64();
h2 = tcg_temp_new_i64();
/* Multipy both even elements from v2 and v3 */
/* Multiply both even elements from v2 and v3 */
read_vec_element_i64(l1, get_field(s, v2), 0, ES_64);
read_vec_element_i64(h1, get_field(s, v3), 0, ES_64);
tcg_gen_mulu2_i64(l1, h1, l1, h1);
@ -2084,7 +2084,7 @@ static DisasJumpType op_vmsl(DisasContext *s, DisasOps *o)
tcg_gen_add2_i64(l1, h1, l1, h1, l1, h1);
}
/* Multipy both odd elements from v2 and v3 */
/* Multiply both odd elements from v2 and v3 */
read_vec_element_i64(l2, get_field(s, v2), 1, ES_64);
read_vec_element_i64(h2, get_field(s, v3), 1, ES_64);
tcg_gen_mulu2_i64(l2, h2, l2, h2);