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Hexagon update

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Merge tag 'pull-hex-20230518-1' of https://github.com/quic/qemu into staging

Hexagon update

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# gpg: Signature made Thu 18 May 2023 12:48:24 PM PDT
# gpg:                using RSA key 3635C788CE62B91FD4C59AB47B0244FB12DE4422
# gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 3635 C788 CE62 B91F D4C5  9AB4 7B02 44FB 12DE 4422

* tag 'pull-hex-20230518-1' of https://github.com/quic/qemu: (44 commits)
  Hexagon (linux-user/hexagon): handle breakpoints
  Hexagon (gdbstub): add HVX support
  Hexagon (gdbstub): fix p3:0 read and write via stub
  Hexagon: add core gdbstub xml data for LLDB
  gdbstub: add test for untimely stop-reply packets
  gdbstub: only send stop-reply packets when allowed to
  Remove test_vshuff from hvx_misc tests
  Hexagon (decode): look for pkts with multiple insns at the same slot
  Hexagon (iclass): update J4_hintjumpr slot constraints
  Hexagon: append eflags to unknown cpu model string
  Hexagon: list available CPUs with `-cpu help`
  Hexagon (target/hexagon/*.py): raise exception on reg parsing error
  target/hexagon: fix = vs. == mishap
  Hexagon (target/hexagon) Additional instructions handled by idef-parser
  Hexagon (target/hexagon) Move items to DisasContext
  Hexagon (target/hexagon) Move pkt_has_store_s1 to DisasContext
  Hexagon (target/hexagon) Move pred_written to DisasContext
  Hexagon (target/hexagon) Move new_pred_value to DisasContext
  Hexagon (target/hexagon) Move new_value to DisasContext
  Hexagon (target/hexagon) Make special new_value for USR
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-05-18 20:44:34 -07:00
commit 449d6d9eb4
60 changed files with 3094 additions and 496 deletions
Download patch file Download diff file Expand all files Collapse all files

3
linux-user/hexagon/cpu_loop.c
View file

@ -63,6 +63,9 @@ void cpu_loop(CPUHexagonState *env)
case EXCP_ATOMIC:
cpu_exec_step_atomic(cs);
break;
case EXCP_DEBUG:
force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, 0);
break;
default:
EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x - aborting\n",
trapnr);

20
linux-user/hexagon/target_elf.h
View file

@ -1,5 +1,5 @@
/*
* Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
* Copyright(c) 2019-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -20,7 +20,10 @@
static inline const char *cpu_get_model(uint32_t eflags)
{
/* For now, treat anything newer than v5 as a v67 */
static char buf[32];
int err;
/* For now, treat anything newer than v5 as a v73 */
/* FIXME - Disable instructions that are newer than the specified arch */
if (eflags == 0x04 || /* v5 */
eflags == 0x05 || /* v55 */
@ -30,11 +33,18 @@ static inline const char *cpu_get_model(uint32_t eflags)
eflags == 0x65 || /* v65 */
eflags == 0x66 || /* v66 */
eflags == 0x67 || /* v67 */
eflags == 0x8067 /* v67t */
eflags == 0x8067 || /* v67t */
eflags == 0x68 || /* v68 */
eflags == 0x69 || /* v69 */
eflags == 0x71 || /* v71 */
eflags == 0x8071 || /* v71t */
eflags == 0x73 /* v73 */
) {
return "v67";
return "v73";
}
return "unknown";
err = snprintf(buf, sizeof(buf), "unknown (0x%x)", eflags);
return err >= 0 && err < sizeof(buf) ? buf : "unknown";
}
#endif