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linux-headers: update to 3.18-rc5
This updates the Linux header to version 3.18-rc5, adding support for (among other things) read-only memslots on ARM and arm64. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Message-id: 1416248898-6302-1-git-send-email-ard.biesheuvel@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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6 changed files with 40 additions and 11 deletions
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@ -476,6 +476,11 @@ struct kvm_get_htab_header {
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/* FP and vector status/control registers */
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#define KVM_REG_PPC_FPSCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x80)
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/*
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* VSCR register is documented as a 32-bit register in the ISA, but it can
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* only be accesses via a vector register. Expose VSCR as a 32-bit register
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* even though the kernel represents it as a 128-bit vector.
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*/
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#define KVM_REG_PPC_VSCR (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0x81)
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/* Virtual processor areas */
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@ -557,6 +562,7 @@ struct kvm_get_htab_header {
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#define KVM_REG_PPC_DABRX (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb8)
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#define KVM_REG_PPC_WORT (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb9)
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#define KVM_REG_PPC_SPRG9 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xba)
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#define KVM_REG_PPC_DBSR (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xbb)
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/* Transactional Memory checkpointed state:
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* This is all GPRs, all VSX regs and a subset of SPRs
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