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riscv: spelling fixes

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Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Michael Tokarev 2023-07-14 14:19:10 +03:00
parent 6c67d98c4a
commit 42fe74998c
11 changed files with 21 additions and 21 deletions
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4
target/riscv/cpu_bits.h
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@ -656,7 +656,7 @@ typedef enum {
/* Leaf page shift amount */
#define PGSHIFT 12
/* Default Reset Vector adress */
/* Default Reset Vector address */
#define DEFAULT_RSTVEC 0x1000
/* Exception causes */
@ -740,7 +740,7 @@ typedef enum RISCVException {
#define PM_CURRENT 0x00000002ULL
#define PM_INSN 0x00000004ULL
/* Execution enviornment configuration bits */
/* Execution environment configuration bits */
#define MENVCFG_FIOM BIT(0)
#define MENVCFG_CBIE (3UL << 4)
#define MENVCFG_CBCFE BIT(6)