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RISC-V: Remove unused class definitions

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Removes a whole lot of unnecessary boilerplate code. Machines
don't need to be objects. The expansion of the SOC object model
for the RISC-V machines will happen in the future as SiFive
plans to add their FE310 and FU540 SOCs to QEMU. However, it
seems that this present boilerplate is complete unnecessary.

Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Michael Clark 2018-03-04 13:27:37 +13:00
parent b7938980fb
commit 42b3a4b7cc
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9 changed files with 0 additions and 123 deletions
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7
include/hw/riscv/spike.h
View file

@ -19,12 +19,6 @@
#ifndef HW_SPIKE_H
#define HW_SPIKE_H
#define TYPE_RISCV_SPIKE_V1_09_1_BOARD "riscv.spike_v1_9_1"
#define TYPE_RISCV_SPIKE_V1_10_0_BOARD "riscv.spike_v1_10"
#define SPIKE(obj) \
OBJECT_CHECK(SpikeState, (obj), TYPE_RISCV_SPIKE_BOARD)
typedef struct {
/*< private >*/
SysBusDevice parent_obj;
@ -35,7 +29,6 @@ typedef struct {
int fdt_size;
} SpikeState;
enum {
SPIKE_MROM,
SPIKE_CLINT,