motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-05 00:33:55 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

target-i386: Define DR7 bit field constants

Browse source 
Implicit use of dr7 bit field is a little hard to understand,
so define constants for them and use them consistently.

Signed-off-by: liguang <lig.fnst@cn.fujitsu.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
This commit is contained in:
liguang 2013-01-15 13:39:55 +08:00 • committed by Andreas Färber
parent 5ec01c2e96
commit 428065ce50
5 changed files with 23 additions and 16 deletions
Download patch file Download diff file Expand all files Collapse all files

18
target-i386/helper.c
View file

@ -969,18 +969,18 @@ void hw_breakpoint_insert(CPUX86State *env, int index)
int type, err = 0;
switch (hw_breakpoint_type(env->dr[7], index)) {
case 0:
case DR7_TYPE_BP_INST:
if (hw_breakpoint_enabled(env->dr[7], index))
err = cpu_breakpoint_insert(env, env->dr[index], BP_CPU,
&env->cpu_breakpoint[index]);
break;
case 1:
case DR7_TYPE_DATA_WR:
type = BP_CPU | BP_MEM_WRITE;
goto insert_wp;
case 2:
case DR7_TYPE_IO_RW:
/* No support for I/O watchpoints yet */
break;
case 3:
case DR7_TYPE_DATA_RW:
type = BP_CPU | BP_MEM_ACCESS;
insert_wp:
err = cpu_watchpoint_insert(env, env->dr[index],
@ -997,15 +997,15 @@ void hw_breakpoint_remove(CPUX86State *env, int index)
if (!env->cpu_breakpoint[index])
return;
switch (hw_breakpoint_type(env->dr[7], index)) {
case 0:
case DR7_TYPE_BP_INST:
if (hw_breakpoint_enabled(env->dr[7], index))
cpu_breakpoint_remove_by_ref(env, env->cpu_breakpoint[index]);
break;
case 1:
case 3:
case DR7_TYPE_DATA_WR:
case DR7_TYPE_DATA_RW:
cpu_watchpoint_remove_by_ref(env, env->cpu_watchpoint[index]);
break;
case 2:
case DR7_TYPE_IO_RW:
/* No support for I/O watchpoints yet */
break;
}
@ -1018,7 +1018,7 @@ int check_hw_breakpoints(CPUX86State *env, int force_dr6_update)
int hit_enabled = 0;
dr6 = env->dr[6] & ~0xf;
for (reg = 0; reg < 4; reg++) {
for (reg = 0; reg < DR7_MAX_BP; reg++) {
type = hw_breakpoint_type(env->dr[7], reg);
if ((type == 0 && env->dr[reg] == env->eip) ||
((type & 1) && env->cpu_watchpoint[reg] &&