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target/riscv: remove cpu->cfg.ext_e

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Create a new "e" RISCVCPUMisaExtConfig property that will update
env->misa_ext* with RVE. Instances of cpu->cfg.ext_e and similar are
replaced with riscv_has_ext(env, RVE).

Remove the old "e" property and 'ext_e' from RISCVCPUConfig.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230406180351.570807-11-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Daniel Henrique Barboza 2023-04-06 15:03:41 -03:00 • committed by Alistair Francis
parent 74828eabf2
commit 427d8e7dd8
3 changed files with 6 additions and 7 deletions
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2
target/riscv/insn_trans/trans_rvzce.c.inc
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@ -117,7 +117,7 @@ static uint32_t decode_push_pop_list(DisasContext *ctx, target_ulong rlist)
{
uint32_t reg_bitmap = 0;
if (ctx->cfg_ptr->ext_e && rlist > 6) {
if (has_ext(ctx, RVE) && rlist > 6) {
return 0;
}