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target/sparc: Move asi integer load/store to decodetree
Move LDDA, LDSBA, LDSHA, LDSWA, LDUBA, LDUHA, LDUWA, LDXA, STBA, STDA, STHA, STWA, STXA. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
parent
0880d20b2e
commit
42071fc16d
2 changed files with 48 additions and 111 deletions
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@ -2162,7 +2162,7 @@ static void gen_helper_st_asi(TCGv_env e, TCGv a, TCGv_i64 r,
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}
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#endif
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static void gen_ld_asi0(DisasContext *dc, DisasASI *da, TCGv dst, TCGv addr)
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static void gen_ld_asi(DisasContext *dc, DisasASI *da, TCGv dst, TCGv addr)
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{
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switch (da->type) {
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case GET_ASI_EXCP:
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@ -2193,16 +2193,7 @@ static void gen_ld_asi0(DisasContext *dc, DisasASI *da, TCGv dst, TCGv addr)
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}
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}
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static void __attribute__((unused))
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gen_ld_asi(DisasContext *dc, TCGv dst, TCGv addr, int insn, MemOp memop)
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{
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DisasASI da = get_asi(dc, insn, memop);
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gen_address_mask(dc, addr);
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gen_ld_asi0(dc, &da, dst, addr);
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}
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static void gen_st_asi0(DisasContext *dc, DisasASI *da, TCGv src, TCGv addr)
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static void gen_st_asi(DisasContext *dc, DisasASI *da, TCGv src, TCGv addr)
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{
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switch (da->type) {
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case GET_ASI_EXCP:
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@ -2274,15 +2265,6 @@ static void gen_st_asi0(DisasContext *dc, DisasASI *da, TCGv src, TCGv addr)
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}
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}
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static void __attribute__((unused))
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gen_st_asi(DisasContext *dc, TCGv src, TCGv addr, int insn, MemOp memop)
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{
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DisasASI da = get_asi(dc, insn, memop);
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gen_address_mask(dc, addr);
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gen_st_asi0(dc, &da, src, addr);
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}
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static void gen_swap_asi0(DisasContext *dc, DisasASI *da,
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TCGv dst, TCGv src, TCGv addr)
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{
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@ -2584,7 +2566,7 @@ gen_stf_asi(DisasContext *dc, TCGv addr, int insn, int size, int rd)
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}
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}
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static void gen_ldda_asi0(DisasContext *dc, DisasASI *da, TCGv addr, int rd)
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static void gen_ldda_asi(DisasContext *dc, DisasASI *da, TCGv addr, int rd)
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{
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TCGv hi = gen_dest_gpr(dc, rd);
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TCGv lo = gen_dest_gpr(dc, rd + 1);
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@ -2660,16 +2642,7 @@ static void gen_ldda_asi0(DisasContext *dc, DisasASI *da, TCGv addr, int rd)
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gen_store_gpr(dc, rd + 1, lo);
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}
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static void __attribute__((unused))
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gen_ldda_asi(DisasContext *dc, TCGv addr, int insn, int rd)
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{
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DisasASI da = get_asi(dc, insn, MO_TEUQ);
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gen_address_mask(dc, addr);
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gen_ldda_asi0(dc, &da, addr, rd);
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}
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static void gen_stda_asi0(DisasContext *dc, DisasASI *da, TCGv addr, int rd)
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static void gen_stda_asi(DisasContext *dc, DisasASI *da, TCGv addr, int rd)
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{
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TCGv hi = gen_load_gpr(dc, rd);
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TCGv lo = gen_load_gpr(dc, rd + 1);
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@ -2761,15 +2734,6 @@ static void gen_stda_asi0(DisasContext *dc, DisasASI *da, TCGv addr, int rd)
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}
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}
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static void __attribute__((unused))
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gen_stda_asi(DisasContext *dc, TCGv hi, TCGv addr, int insn, int rd)
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{
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DisasASI da = get_asi(dc, insn, MO_TEUQ);
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gen_address_mask(dc, addr);
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gen_stda_asi0(dc, &da, addr, rd);
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}
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static TCGv get_src1(DisasContext *dc, unsigned int insn)
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{
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unsigned int rs1 = GET_FIELD(insn, 13, 17);
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@ -4580,7 +4544,7 @@ static bool do_ld_gpr(DisasContext *dc, arg_r_r_ri_asi *a, MemOp mop)
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da = resolve_asi(dc, a->asi, mop);
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reg = gen_dest_gpr(dc, a->rd);
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gen_ld_asi0(dc, &da, reg, addr);
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gen_ld_asi(dc, &da, reg, addr);
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gen_store_gpr(dc, a->rd, reg);
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return advance_pc(dc);
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}
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@ -4604,7 +4568,7 @@ static bool do_st_gpr(DisasContext *dc, arg_r_r_ri_asi *a, MemOp mop)
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da = resolve_asi(dc, a->asi, mop);
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reg = gen_load_gpr(dc, a->rd);
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gen_st_asi0(dc, &da, reg, addr);
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gen_st_asi(dc, &da, reg, addr);
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return advance_pc(dc);
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}
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@ -4626,7 +4590,7 @@ static bool trans_LDD(DisasContext *dc, arg_r_r_ri_asi *a)
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return false;
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}
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da = resolve_asi(dc, a->asi, MO_TEUQ);
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gen_ldda_asi0(dc, &da, addr, a->rd);
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gen_ldda_asi(dc, &da, addr, a->rd);
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return advance_pc(dc);
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}
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@ -4643,7 +4607,7 @@ static bool trans_STD(DisasContext *dc, arg_r_r_ri_asi *a)
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return false;
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}
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da = resolve_asi(dc, a->asi, MO_TEUQ);
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gen_stda_asi0(dc, &da, addr, a->rd);
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gen_stda_asi(dc, &da, addr, a->rd);
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return advance_pc(dc);
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}
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@ -5475,9 +5439,17 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
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case 0x3: /* ldd, load double word */
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case 0x9: /* ldsb, load signed byte */
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case 0xa: /* ldsh, load signed halfword */
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case 0x10: /* lda, V9 lduwa, load word alternate */
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case 0x11: /* lduba, load unsigned byte alternate */
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case 0x12: /* lduha, load unsigned halfword alternate */
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case 0x13: /* ldda, load double word alternate */
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case 0x19: /* ldsba, load signed byte alternate */
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case 0x1a: /* ldsha, load signed halfword alternate */
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g_assert_not_reached(); /* in decodetree */
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case 0x08: /* V9 ldsw */
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case 0x0b: /* V9 ldx */
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case 0x18: /* V9 ldswa */
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case 0x1b: /* V9 ldxa */
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goto illegal_insn; /* in decodetree */
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case 0xd: /* ldstub */
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gen_ldstub(dc, cpu_val, cpu_addr, dc->mem_idx);
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@ -5489,27 +5461,6 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
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dc->mem_idx, MO_TEUL);
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break;
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#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
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case 0x10: /* lda, V9 lduwa, load word alternate */
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gen_ld_asi(dc, cpu_val, cpu_addr, insn, MO_TEUL);
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break;
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case 0x11: /* lduba, load unsigned byte alternate */
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gen_ld_asi(dc, cpu_val, cpu_addr, insn, MO_UB);
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break;
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case 0x12: /* lduha, load unsigned halfword alternate */
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gen_ld_asi(dc, cpu_val, cpu_addr, insn, MO_TEUW);
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break;
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case 0x13: /* ldda, load double word alternate */
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if (rd & 1) {
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goto illegal_insn;
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}
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gen_ldda_asi(dc, cpu_addr, insn, rd);
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goto skip_move;
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case 0x19: /* ldsba, load signed byte alternate */
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gen_ld_asi(dc, cpu_val, cpu_addr, insn, MO_SB);
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break;
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case 0x1a: /* ldsha, load signed halfword alternate */
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gen_ld_asi(dc, cpu_val, cpu_addr, insn, MO_TESW);
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break;
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case 0x1d: /* ldstuba -- XXX: should be atomically */
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gen_ldstub_asi(dc, cpu_val, cpu_addr, insn);
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break;
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@ -5520,12 +5471,6 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
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break;
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#endif
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#ifdef TARGET_SPARC64
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case 0x18: /* V9 ldswa */
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gen_ld_asi(dc, cpu_val, cpu_addr, insn, MO_TESL);
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break;
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case 0x1b: /* V9 ldxa */
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gen_ld_asi(dc, cpu_val, cpu_addr, insn, MO_TEUQ);
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break;
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case 0x2d: /* V9 prefetch, no effect */
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goto skip_move;
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case 0x30: /* V9 ldfa */
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@ -5557,7 +5502,7 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
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goto illegal_insn;
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}
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gen_store_gpr(dc, rd, cpu_val);
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#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
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#if defined(TARGET_SPARC64)
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skip_move: ;
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#endif
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} else if (xop >= 0x20 && xop < 0x24) {
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@ -5610,45 +5555,6 @@ static void disas_sparc_legacy(DisasContext *dc, unsigned int insn)
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default:
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goto illegal_insn;
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}
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} else if (xop < 8 || (xop >= 0x14 && xop < 0x18) ||
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xop == 0xe || xop == 0x1e) {
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#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
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TCGv cpu_val = gen_load_gpr(dc, rd);
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#endif
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switch (xop) {
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case 0x4: /* st, store word */
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case 0x5: /* stb, store byte */
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case 0x6: /* sth, store halfword */
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case 0x7: /* std, store double word */
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g_assert_not_reached(); /* in decodetree */
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case 0x0e: /* V9 stx */
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goto illegal_insn; /* in decodetree */
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#if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64)
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case 0x14: /* sta, V9 stwa, store word alternate */
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gen_st_asi(dc, cpu_val, cpu_addr, insn, MO_TEUL);
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break;
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case 0x15: /* stba, store byte alternate */
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gen_st_asi(dc, cpu_val, cpu_addr, insn, MO_UB);
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break;
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case 0x16: /* stha, store halfword alternate */
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gen_st_asi(dc, cpu_val, cpu_addr, insn, MO_TEUW);
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break;
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case 0x17: /* stda, store double word alternate */
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if (rd & 1) {
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goto illegal_insn;
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}
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gen_stda_asi(dc, cpu_val, cpu_addr, insn, rd);
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break;
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#endif
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#ifdef TARGET_SPARC64
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case 0x1e: /* V9 stxa */
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gen_st_asi(dc, cpu_val, cpu_addr, insn, MO_TEUQ);
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break;
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#endif
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default:
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goto illegal_insn;
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}
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} else if (xop > 0x23 && xop < 0x28) {
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if (gen_trap_ifnofpu(dc)) {
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goto jmp_insn;
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