hw/riscv: hart: Add a new 'resetvec' property

RISC-V machines do not instantiate RISC-V CPUs directly, instead
they do that via the hart array. Add a new property for the reset
vector address to allow the value to be passed to the CPU, before
CPU is realized.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <1598924352-89526-3-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Bin Meng 2020-09-01 09:38:57 +08:00 committed by Alistair Francis
parent 9b4c9b2b2a
commit 4100d5e6dc
2 changed files with 4 additions and 0 deletions

View file

@ -37,6 +37,7 @@ typedef struct RISCVHartArrayState {
uint32_t num_harts;
uint32_t hartid_base;
char *cpu_type;
uint64_t resetvec;
RISCVCPU *harts;
} RISCVHartArrayState;