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target-arm: Add the pmceid0 and pmceid1 registers
Signed-off-by: Aaron Lindsay <alindsay@codeaurora.org> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Tested-by: Nathan Rossi <nathan@nathanrossi.com> Message-id: da0563119a9f56fd5fbdc26e7ed19a8a8457c5b9.1455060548.git.alistair.francis@xilinx.com [PMM: Use 0 for PMCEID0 values for A15 and A57 since our PMU does not currently implement any events.] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -148,6 +148,8 @@ typedef struct ARMCPU {
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uint32_t id_pfr0;
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uint32_t id_pfr1;
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uint32_t id_dfr0;
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uint32_t pmceid0;
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uint32_t pmceid1;
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uint32_t id_afr0;
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uint32_t id_mmfr0;
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uint32_t id_mmfr1;
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