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tcg: Expand fallback add2 with 32-bit operations

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No need to expand to i64 to perform the add.
This is smaller on a loongarch64 host, e.g.

	bstrpick_d  r28, r27, 31, 0
	bstrpick_d  r29, r24, 31, 0
	add_d       r28, r28, r29
	addi_w      r29, r28, 0
	srai_d      r28, r28, 32
  ---
	add_w       r28, r27, r24
	sltu        r29, r28, r24

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2025-01-13 20:14:09 -08:00
parent 61d6a8767a
commit 3ff7e44ef3
1 changed files with 9 additions and 8 deletions
Download patch file Download diff file Expand all files Collapse all files

17
tcg/tcg-op.c
View file

@ -1105,14 +1105,15 @@ void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
if (TCG_TARGET_HAS_add2_i32) {
tcg_gen_op6_i32(INDEX_op_add2_i32, rl, rh, al, ah, bl, bh);
} else {
TCGv_i64 t0 = tcg_temp_ebb_new_i64();
TCGv_i64 t1 = tcg_temp_ebb_new_i64();
tcg_gen_concat_i32_i64(t0, al, ah);
tcg_gen_concat_i32_i64(t1, bl, bh);
tcg_gen_add_i64(t0, t0, t1);
tcg_gen_extr_i64_i32(rl, rh, t0);
tcg_temp_free_i64(t0);
tcg_temp_free_i64(t1);
TCGv_i32 t0 = tcg_temp_ebb_new_i32();
TCGv_i32 t1 = tcg_temp_ebb_new_i32();
tcg_gen_add_i32(t0, al, bl);
tcg_gen_setcond_i32(TCG_COND_LTU, t1, t0, al);
tcg_gen_add_i32(rh, ah, bh);
tcg_gen_add_i32(rh, rh, t1);
tcg_gen_mov_i32(rl, t0);
tcg_temp_free_i32(t0);
tcg_temp_free_i32(t1);
}
}