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hw/intc: Convert the memops to with_attrs in LoongArch extioi

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Converting the MemoryRegionOps read/write handlers to
with_attrs in LoongArch extioi emulation.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20221021015307.2570844-2-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
This commit is contained in:
Xiaojuan Yang 2022-10-21 09:53:06 +08:00 • committed by Song Gao
parent ece5f8374d
commit 3fc8f74b51
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GPG key ID: 40A2FFF239263EDF
2 changed files with 18 additions and 16 deletions
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31
hw/intc/loongarch_extioi.c
View file

@ -68,44 +68,45 @@ static void extioi_setirq(void *opaque, int irq, int level)
extioi_update_irq(s, irq, level); extioi_update_irq(s, irq, level);
} }
static uint64_t extioi_readw(void *opaque, hwaddr addr, unsigned size) static MemTxResult extioi_readw(void *opaque, hwaddr addr, uint64_t *data,
unsigned size, MemTxAttrs attrs)
{ {
LoongArchExtIOI *s = LOONGARCH_EXTIOI(opaque); LoongArchExtIOI *s = LOONGARCH_EXTIOI(opaque);
unsigned long offset = addr & 0xffff; unsigned long offset = addr & 0xffff;
uint32_t index, cpu, ret = 0; uint32_t index, cpu;
switch (offset) { switch (offset) {
case EXTIOI_NODETYPE_START ... EXTIOI_NODETYPE_END - 1: case EXTIOI_NODETYPE_START ... EXTIOI_NODETYPE_END - 1:
index = (offset - EXTIOI_NODETYPE_START) >> 2; index = (offset - EXTIOI_NODETYPE_START) >> 2;
ret = s->nodetype[index]; *data = s->nodetype[index];
break; break;
case EXTIOI_IPMAP_START ... EXTIOI_IPMAP_END - 1: case EXTIOI_IPMAP_START ... EXTIOI_IPMAP_END - 1:
index = (offset - EXTIOI_IPMAP_START) >> 2; index = (offset - EXTIOI_IPMAP_START) >> 2;
ret = s->ipmap[index]; *data = s->ipmap[index];
break; break;
case EXTIOI_ENABLE_START ... EXTIOI_ENABLE_END - 1: case EXTIOI_ENABLE_START ... EXTIOI_ENABLE_END - 1:
index = (offset - EXTIOI_ENABLE_START) >> 2; index = (offset - EXTIOI_ENABLE_START) >> 2;
ret = s->enable[index]; *data = s->enable[index];
break; break;
case EXTIOI_BOUNCE_START ... EXTIOI_BOUNCE_END - 1: case EXTIOI_BOUNCE_START ... EXTIOI_BOUNCE_END - 1:
index = (offset - EXTIOI_BOUNCE_START) >> 2; index = (offset - EXTIOI_BOUNCE_START) >> 2;
ret = s->bounce[index]; *data = s->bounce[index];
break; break;
case EXTIOI_COREISR_START ... EXTIOI_COREISR_END - 1: case EXTIOI_COREISR_START ... EXTIOI_COREISR_END - 1:
index = ((offset - EXTIOI_COREISR_START) & 0x1f) >> 2; index = ((offset - EXTIOI_COREISR_START) & 0x1f) >> 2;
cpu = ((offset - EXTIOI_COREISR_START) >> 8) & 0x3; cpu = ((offset - EXTIOI_COREISR_START) >> 8) & 0x3;
ret = s->coreisr[cpu][index]; *data = s->coreisr[cpu][index];
break; break;
case EXTIOI_COREMAP_START ... EXTIOI_COREMAP_END - 1: case EXTIOI_COREMAP_START ... EXTIOI_COREMAP_END - 1:
index = (offset - EXTIOI_COREMAP_START) >> 2; index = (offset - EXTIOI_COREMAP_START) >> 2;
ret = s->coremap[index]; *data = s->coremap[index];
break; break;
default: default:
break; break;
} }
trace_loongarch_extioi_readw(addr, ret); trace_loongarch_extioi_readw(addr, *data);
return ret; return MEMTX_OK;
} }
static inline void extioi_enable_irq(LoongArchExtIOI *s, int index,\ static inline void extioi_enable_irq(LoongArchExtIOI *s, int index,\
@ -127,8 +128,9 @@ static inline void extioi_enable_irq(LoongArchExtIOI *s, int index,\
} }
} }
static void extioi_writew(void *opaque, hwaddr addr, static MemTxResult extioi_writew(void *opaque, hwaddr addr,
uint64_t val, unsigned size) uint64_t val, unsigned size,
MemTxAttrs attrs)
{ {
LoongArchExtIOI *s = LOONGARCH_EXTIOI(opaque); LoongArchExtIOI *s = LOONGARCH_EXTIOI(opaque);
int i, cpu, index, old_data, irq; int i, cpu, index, old_data, irq;
@ -231,11 +233,12 @@ static void extioi_writew(void *opaque, hwaddr addr,
default: default:
break; break;
} }
return MEMTX_OK;
} }
static const MemoryRegionOps extioi_ops = { static const MemoryRegionOps extioi_ops = {
.read = extioi_readw, .read_with_attrs = extioi_readw,
.write = extioi_writew, .write_with_attrs = extioi_writew,
.impl.min_access_size = 4, .impl.min_access_size = 4,
.impl.max_access_size = 4, .impl.max_access_size = 4,
.valid.min_access_size = 4, .valid.min_access_size = 4,

3
hw/intc/trace-events
View file

@ -306,6 +306,5 @@ loongarch_msi_set_irq(int irq_num) "set msi irq %d"
# loongarch_extioi.c # loongarch_extioi.c
loongarch_extioi_setirq(int irq, int level) "set extirq irq %d level %d" loongarch_extioi_setirq(int irq, int level) "set extirq irq %d level %d"
loongarch_extioi_readw(uint64_t addr, uint32_t val) "addr: 0x%"PRIx64 "val: 0x%x" loongarch_extioi_readw(uint64_t addr, uint64_t val) "addr: 0x%"PRIx64 "val: 0x%" PRIx64
loongarch_extioi_writew(uint64_t addr, uint64_t val) "addr: 0x%"PRIx64 "val: 0x%" PRIx64 loongarch_extioi_writew(uint64_t addr, uint64_t val) "addr: 0x%"PRIx64 "val: 0x%" PRIx64