motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-03 07:43:54 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

hw/intc/loongson_ipi: Restrict to MIPS

Browse source 
Now than LoongArch target can use the TYPE_LOONGARCH_IPI
model, restrict TYPE_LOONGSON_IPI to MIPS.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20240805180622.21001-15-philmd@linaro.org>
This commit is contained in:
Bibo Mao 2024-07-17 23:32:49 +02:00 • committed by Philippe Mathieu-Daudé
parent ef2f11454c
commit 3fad6db79e
2 changed files with 0 additions and 16 deletions
Download patch file Download diff file Expand all files Collapse all files

14
hw/intc/loongson_ipi.c
View file

@ -16,22 +16,9 @@
#include "exec/address-spaces.h"
#include "exec/memory.h"
#include "migration/vmstate.h"
#ifdef TARGET_LOONGARCH64
#include "target/loongarch/cpu.h"
#endif
#ifdef TARGET_MIPS
#include "target/mips/cpu.h"
#endif
#include "trace.h"
#ifdef TARGET_LOONGARCH64
static AddressSpace *get_iocsr_as(CPUState *cpu)
{
return LOONGARCH_CPU(cpu)->env.address_space_iocsr;
}
#endif
#ifdef TARGET_MIPS
static AddressSpace *get_iocsr_as(CPUState *cpu)
{
if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) {
@ -40,7 +27,6 @@ static AddressSpace *get_iocsr_as(CPUState *cpu)
return NULL;
}
#endif
static const MemoryRegionOps loongson_ipi_core_ops = {
.read_with_attrs = loongson_ipi_core_readl,