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Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
# By Alexey Kardashevskiy (3) and others # Via Paolo Bonzini * qemu-kvm/uq/master: target-i386: add feature kvm_pv_unhalt linux-headers: update to 3.12-rc1 target-i386: forward CPUID cache leaves when -cpu host is used linux-headers: update to 3.11 kvm: fix traces to use %x instead of %d kvmvapic: Clear also physical ROM address when entering INACTIVE state kvmvapic: Enter inactive state on hardware reset kvmvapic: Catch invalid ROM size kvm irqfd: support direct msimessage to irq translation fix steal time MSR vmsd callback to proper opaque type kvm: warn if num cpus is greater than num recommended cpu: Move cpu state syncs up into cpu_dump_state() exec: always use MADV_DONTFORK Message-id: 1379694292-1601-1-git-send-email-pbonzini@redhat.com
This commit is contained in:
commit
3e4be9c297
20 changed files with 411 additions and 99 deletions
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@ -70,6 +70,9 @@ typedef struct X86CPU {
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bool hyperv_relaxed_timing;
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int hyperv_spinlock_attempts;
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/* if true the CPUID code directly forward host cache leaves to the guest */
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bool cache_info_passthrough;
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/* Features that were filtered out because of missing host capabilities */
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uint32_t filtered_features[FEATURE_WORDS];
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@ -235,7 +235,7 @@ static const char *ext4_feature_name[] = {
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static const char *kvm_feature_name[] = {
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"kvmclock", "kvm_nopiodelay", "kvm_mmu", "kvmclock",
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"kvm_asyncpf", "kvm_steal_time", "kvm_pv_eoi", NULL,
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"kvm_asyncpf", "kvm_steal_time", "kvm_pv_eoi", "kvm_pv_unhalt",
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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@ -486,6 +486,7 @@ typedef struct x86_def_t {
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int stepping;
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FeatureWordArray features;
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char model_id[48];
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bool cache_info_passthrough;
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} x86_def_t;
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#define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
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@ -1139,6 +1140,7 @@ static void kvm_cpu_fill_host(x86_def_t *x86_cpu_def)
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assert(kvm_enabled());
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x86_cpu_def->name = "host";
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x86_cpu_def->cache_info_passthrough = true;
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host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
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x86_cpu_vendor_words2str(x86_cpu_def->vendor, ebx, edx, ecx);
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@ -1888,6 +1890,7 @@ static void cpu_x86_register(X86CPU *cpu, const char *name, Error **errp)
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env->features[FEAT_C000_0001_EDX] = def->features[FEAT_C000_0001_EDX];
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env->features[FEAT_7_0_EBX] = def->features[FEAT_7_0_EBX];
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env->cpuid_xlevel2 = def->xlevel2;
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cpu->cache_info_passthrough = def->cache_info_passthrough;
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object_property_set_str(OBJECT(cpu), def->model_id, "model-id", errp);
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}
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@ -2062,6 +2065,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
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break;
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case 2:
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/* cache info: needed for Pentium Pro compatibility */
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if (cpu->cache_info_passthrough) {
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host_cpuid(index, 0, eax, ebx, ecx, edx);
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break;
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}
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*eax = 1; /* Number of CPUID[EAX=2] calls required */
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*ebx = 0;
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*ecx = 0;
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@ -2071,6 +2078,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
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break;
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case 4:
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/* cache info: needed for Core compatibility */
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if (cpu->cache_info_passthrough) {
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host_cpuid(index, count, eax, ebx, ecx, edx);
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break;
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}
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if (cs->nr_cores > 1) {
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*eax = (cs->nr_cores - 1) << 26;
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} else {
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@ -2228,6 +2239,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
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break;
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case 0x80000005:
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/* cache info (L1 cache) */
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if (cpu->cache_info_passthrough) {
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host_cpuid(index, 0, eax, ebx, ecx, edx);
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break;
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}
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*eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) | \
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(L1_ITLB_2M_ASSOC << 8) | (L1_ITLB_2M_ENTRIES);
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*ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) | \
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@ -2239,6 +2254,10 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
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break;
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case 0x80000006:
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/* cache info (L2 cache) */
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if (cpu->cache_info_passthrough) {
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host_cpuid(index, 0, eax, ebx, ecx, edx);
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break;
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}
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*eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) | \
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(L2_DTLB_2M_ENTRIES << 16) | \
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(AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) | \
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@ -188,8 +188,6 @@ void x86_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
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char cc_op_name[32];
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static const char *seg_name[6] = { "ES", "CS", "SS", "DS", "FS", "GS" };
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cpu_synchronize_state(cs);
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eflags = cpu_compute_eflags(env);
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#ifdef TARGET_X86_64
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if (env->hflags & HF_CS64_MASK) {
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@ -330,9 +330,9 @@ static bool pv_eoi_msr_needed(void *opaque)
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static bool steal_time_msr_needed(void *opaque)
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{
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CPUX86State *cpu = opaque;
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X86CPU *cpu = opaque;
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return cpu->steal_time_msr != 0;
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return cpu->env.steal_time_msr != 0;
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}
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static const VMStateDescription vmstate_steal_time_msr = {
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@ -341,7 +341,7 @@ static const VMStateDescription vmstate_steal_time_msr = {
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.minimum_version_id = 1,
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.minimum_version_id_old = 1,
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.fields = (VMStateField []) {
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VMSTATE_UINT64(steal_time_msr, CPUX86State),
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VMSTATE_UINT64(env.steal_time_msr, X86CPU),
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VMSTATE_END_OF_LIST()
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}
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};
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