mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-04 16:23:55 -06:00
target/arm: Move id_aa64mmfr* to ARMISARegisters
At the same time, define the fields for these registers, and use those defines in arm_pamax(). Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20181203203839.757-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: fixed up typo (s/achf/ahcf/) belatedly spotted by RTH] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
f6ef171db8
commit
3dc91ddbc6
5 changed files with 35 additions and 8 deletions
|
@ -229,7 +229,8 @@ static inline unsigned int arm_pamax(ARMCPU *cpu)
|
|||
[4] = 44,
|
||||
[5] = 48,
|
||||
};
|
||||
unsigned int parange = extract32(cpu->id_aa64mmfr0, 0, 4);
|
||||
unsigned int parange =
|
||||
FIELD_EX64(cpu->isar.id_aa64mmfr0, ID_AA64MMFR0, PARANGE);
|
||||
|
||||
/* id_aa64mmfr0 is a read-only register so values outside of the
|
||||
* supported mappings can be considered an implementation error. */
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue