motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-03 07:43:54 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

target/riscv: Set default NaN pattern explicitly

Browse source 
Set the default NaN pattern explicitly for riscv.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241202131347.498124-53-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2024-12-11 15:31:07 +00:00
parent 38ea9ade29
commit 3d3d399e76
1 changed files with 2 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

2
target/riscv/cpu.c
View file

@ -1022,6 +1022,8 @@ static void riscv_cpu_reset_hold(Object *obj, ResetType type)
cs->exception_index = RISCV_EXCP_NONE;
env->load_res = -1;
set_default_nan_mode(1, &env->fp_status);
/* Default NaN value: sign bit clear, frac msb set */
set_float_default_nan_pattern(0b01000000, &env->fp_status);
env->vill = true;
#ifndef CONFIG_USER_ONLY