mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-09 18:44:58 -06:00
target-xtensa: fix tb invalidation for IBREAK and LOOP
Instruction breakpoint/zero overhead loop handling code is built into TBs pointed to by IBREAKA/LEND SRs. When these or related SRs get changed TBs at virtual addresses corresponding to their old and their new values must be invalidated. Virtual address range is passed to the tb_invalidate_phys_page_range, which is incorrect in system emulation mode. To fix it use guest TLB/MMU to translate virtual address to physical address. However the guest may not have virtual-to-physical mapping at the moment of IBREAKA/LEND change, thus this fix is not 100% accurate. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
parent
1e7855a558
commit
3d0be8a5c1
2 changed files with 20 additions and 11 deletions
|
@ -459,11 +459,13 @@ static void gen_rsr(DisasContext *dc, TCGv_i32 d, uint32_t sr)
|
|||
static void gen_wsr_lbeg(DisasContext *dc, uint32_t sr, TCGv_i32 s)
|
||||
{
|
||||
gen_helper_wsr_lbeg(s);
|
||||
gen_jumpi_check_loop_end(dc, 0);
|
||||
}
|
||||
|
||||
static void gen_wsr_lend(DisasContext *dc, uint32_t sr, TCGv_i32 s)
|
||||
{
|
||||
gen_helper_wsr_lend(s);
|
||||
gen_jumpi_check_loop_end(dc, 0);
|
||||
}
|
||||
|
||||
static void gen_wsr_sar(DisasContext *dc, uint32_t sr, TCGv_i32 s)
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue