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* sort the PowerPC target object files
* make PowerPC NVRAM accessors generic to be able to use a MacIO NVRAM instead of the M48T59 one * split PowerMac targets code: - move all PowerMac related definitions and prototypes into hw/ppc_mac.h - add hw/mac_dbdma.c, hw/mac_nvram.c and macio.c which implements shared PowerMac devices - define the g3bw machine in a new hw/ppc_oldworld.c file * Fix the g3bw target: - fix the Grackle host PCI device - connect the Heathrow PIC to the PowerPC 6xx bus pins git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3475 c046a42c-6fe2-441c-8c8c-71466251a162
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parent
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13 changed files with 914 additions and 518 deletions
12
hw/cuda.c
12
hw/cuda.c
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@ -1,7 +1,8 @@
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/*
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* QEMU CUDA support
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* QEMU PowerMac CUDA device support
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*
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* Copyright (c) 2004 Fabrice Bellard
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* Copyright (c) 2004-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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@ -22,6 +23,7 @@
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* THE SOFTWARE.
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*/
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#include "vl.h"
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#include "ppc_mac.h"
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/* XXX: implement all timer modes */
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@ -634,10 +636,9 @@ static CPUReadMemoryFunc *cuda_read[] = {
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&cuda_readl,
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};
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int cuda_init(qemu_irq irq)
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void cuda_init (int *cuda_mem_index, qemu_irq irq)
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{
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CUDAState *s = &cuda_state;
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int cuda_mem_index;
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s->irq = irq;
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@ -653,6 +654,5 @@ int cuda_init(qemu_irq irq)
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set_counter(s, &s->timers[1], 0xffff);
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s->adb_poll_timer = qemu_new_timer(vm_clock, cuda_adb_poll, s);
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cuda_mem_index = cpu_register_io_memory(0, cuda_read, cuda_write, s);
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return cuda_mem_index;
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*cuda_mem_index = cpu_register_io_memory(0, cuda_read, cuda_write, s);
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}
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