* sort the PowerPC target object files

* make PowerPC NVRAM accessors generic to be able to use a MacIO NVRAM
  instead of the M48T59 one
* split PowerMac targets code:
 - move all PowerMac related definitions and prototypes into hw/ppc_mac.h
 - add hw/mac_dbdma.c, hw/mac_nvram.c and macio.c
   which implements shared PowerMac devices
 - define the g3bw machine in a new hw/ppc_oldworld.c file
* Fix the g3bw target:
 - fix the Grackle host PCI device
 - connect the Heathrow PIC to the PowerPC 6xx bus pins


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3475 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
j_mayer 2007-10-28 23:42:18 +00:00
parent 897b4c6c4e
commit 3cbee15b9a
13 changed files with 914 additions and 518 deletions

View file

@ -1,7 +1,8 @@
/*
* QEMU CUDA support
* QEMU PowerMac CUDA device support
*
* Copyright (c) 2004 Fabrice Bellard
* Copyright (c) 2004-2007 Fabrice Bellard
* Copyright (c) 2007 Jocelyn Mayer
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
@ -22,6 +23,7 @@
* THE SOFTWARE.
*/
#include "vl.h"
#include "ppc_mac.h"
/* XXX: implement all timer modes */
@ -634,10 +636,9 @@ static CPUReadMemoryFunc *cuda_read[] = {
&cuda_readl,
};
int cuda_init(qemu_irq irq)
void cuda_init (int *cuda_mem_index, qemu_irq irq)
{
CUDAState *s = &cuda_state;
int cuda_mem_index;
s->irq = irq;
@ -653,6 +654,5 @@ int cuda_init(qemu_irq irq)
set_counter(s, &s->timers[1], 0xffff);
s->adb_poll_timer = qemu_new_timer(vm_clock, cuda_adb_poll, s);
cuda_mem_index = cpu_register_io_memory(0, cuda_read, cuda_write, s);
return cuda_mem_index;
*cuda_mem_index = cpu_register_io_memory(0, cuda_read, cuda_write, s);
}