sysbus: Convert to sysbus_realize() etc. with Coccinelle

Convert from qdev_realize(), qdev_realize_and_unref() with null @bus
argument to sysbus_realize(), sysbus_realize_and_unref().

Coccinelle script:

    @@
    expression dev, errp;
    @@
    -    qdev_realize(DEVICE(dev), NULL, errp);
    +    sysbus_realize(SYS_BUS_DEVICE(dev), errp);

    @@
    expression sysbus_dev, dev, errp;
    @@
    +    sysbus_dev = SYS_BUS_DEVICE(dev);
    -    qdev_realize_and_unref(dev, NULL, errp);
    +    sysbus_realize_and_unref(sysbus_dev, errp);
    -    sysbus_dev = SYS_BUS_DEVICE(dev);

    @@
    expression sysbus_dev, dev, errp;
    expression expr;
    @@
         sysbus_dev = SYS_BUS_DEVICE(dev);
         ... when != dev = expr;
    -    qdev_realize_and_unref(dev, NULL, errp);
    +    sysbus_realize_and_unref(sysbus_dev, errp);

    @@
    expression dev, errp;
    @@
    -    qdev_realize_and_unref(DEVICE(dev), NULL, errp);
    +    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);

    @@
    expression dev, errp;
    @@
    -    qdev_realize_and_unref(dev, NULL, errp);
    +    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), errp);

Whitespace changes minimized manually.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20200610053247.1583243-46-armbru@redhat.com>
[Conflicts in hw/misc/empty_slot.c and hw/sparc/leon3.c resolved]
This commit is contained in:
Markus Armbruster 2020-06-10 07:32:34 +02:00
parent 496a852562
commit 3c6ef471ee
114 changed files with 257 additions and 257 deletions

View file

@ -214,14 +214,14 @@ static void leon3_generic_hw_init(MachineState *machine)
qemu_register_reset(main_cpu_reset, reset_info);
ahb_pnp = GRLIB_AHB_PNP(qdev_new(TYPE_GRLIB_AHB_PNP));
qdev_realize_and_unref(DEVICE(ahb_pnp), NULL, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(ahb_pnp), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(ahb_pnp), 0, LEON3_AHB_PNP_OFFSET);
grlib_ahb_pnp_add_entry(ahb_pnp, 0, 0, GRLIB_VENDOR_GAISLER,
GRLIB_LEON3_DEV, GRLIB_AHB_MASTER,
GRLIB_CPU_AREA);
apb_pnp = GRLIB_APB_PNP(qdev_new(TYPE_GRLIB_APB_PNP));
qdev_realize_and_unref(DEVICE(apb_pnp), NULL, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(apb_pnp), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(apb_pnp), 0, LEON3_APB_PNP_OFFSET);
grlib_ahb_pnp_add_entry(ahb_pnp, LEON3_APB_PNP_OFFSET, 0xFFF,
GRLIB_VENDOR_GAISLER, GRLIB_APBMST_DEV,
@ -233,7 +233,7 @@ static void leon3_generic_hw_init(MachineState *machine)
env, "pil", 1);
qdev_connect_gpio_out_named(dev, "grlib-irq", 0,
qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0));
qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET);
env->irq_manager = dev;
env->qemu_irq_ack = leon3_irq_manager;
@ -326,7 +326,7 @@ static void leon3_generic_hw_init(MachineState *machine)
qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT);
qdev_prop_set_uint32(dev, "frequency", CPU_CLK);
qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ);
qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET);
for (i = 0; i < LEON3_TIMER_COUNT; i++) {
@ -341,7 +341,7 @@ static void leon3_generic_hw_init(MachineState *machine)
/* Allocate uart */
dev = qdev_new(TYPE_GRLIB_APB_UART);
qdev_prop_set_chr(dev, "chrdev", serial_hd(0));
qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irqs[LEON3_UART_IRQ]);
grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF,

View file

@ -318,8 +318,8 @@ static void *iommu_init(hwaddr addr, uint32_t version, qemu_irq irq)
dev = qdev_new(TYPE_SUN4M_IOMMU);
qdev_prop_set_uint32(dev, "version", version);
qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
sysbus_connect_irq(s, 0, irq);
sysbus_mmio_map(s, 0, addr);
@ -337,7 +337,7 @@ static void *sparc32_dma_init(hwaddr dma_base,
SysBusPCNetState *lance;
dma = qdev_new(TYPE_SPARC32_DMA);
qdev_realize_and_unref(dma, NULL, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dma), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, dma_base);
espdma = SPARC32_ESPDMA_DEVICE(object_resolve_path_component(
@ -368,9 +368,9 @@ static DeviceState *slavio_intctl_init(hwaddr addr,
unsigned int i, j;
dev = qdev_new("slavio_intctl");
qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
for (i = 0; i < MAX_CPUS; i++) {
for (j = 0; j < MAX_PILS; j++) {
@ -397,8 +397,8 @@ static void slavio_timer_init_all(hwaddr addr, qemu_irq master_irq,
dev = qdev_new("slavio_timer");
qdev_prop_set_uint32(dev, "num_cpus", num_cpus);
qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
sysbus_connect_irq(s, 0, master_irq);
sysbus_mmio_map(s, 0, addr + SYS_TIMER_OFFSET);
@ -434,8 +434,8 @@ static void slavio_misc_init(hwaddr base,
SysBusDevice *s;
dev = qdev_new("slavio_misc");
qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
if (base) {
/* 8 bit registers */
/* Slavio control */
@ -472,8 +472,8 @@ static void ecc_init(hwaddr base, qemu_irq irq, uint32_t version)
dev = qdev_new("eccmemctl");
qdev_prop_set_uint32(dev, "version", version);
qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
sysbus_connect_irq(s, 0, irq);
sysbus_mmio_map(s, 0, base);
if (version == 0) { // SS-600MP only
@ -487,8 +487,8 @@ static void apc_init(hwaddr power_base, qemu_irq cpu_halt)
SysBusDevice *s;
dev = qdev_new("apc");
qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
/* Power management (APC) XXX: not a Slavio device */
sysbus_mmio_map(s, 0, power_base);
sysbus_connect_irq(s, 0, cpu_halt);
@ -505,8 +505,8 @@ static void tcx_init(hwaddr addr, qemu_irq irq, int vram_size, int width,
qdev_prop_set_uint16(dev, "width", width);
qdev_prop_set_uint16(dev, "height", height);
qdev_prop_set_uint16(dev, "depth", depth);
qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
/* 10/ROM : FCode ROM */
sysbus_mmio_map(s, 0, addr);
@ -557,8 +557,8 @@ static void cg3_init(hwaddr addr, qemu_irq irq, int vram_size, int width,
qdev_prop_set_uint16(dev, "width", width);
qdev_prop_set_uint16(dev, "height", height);
qdev_prop_set_uint16(dev, "depth", depth);
qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
/* FCode ROM */
sysbus_mmio_map(s, 0, addr);
@ -582,8 +582,8 @@ static void idreg_init(hwaddr addr)
SysBusDevice *s;
dev = qdev_new(TYPE_MACIO_ID_REGISTER);
qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, addr);
address_space_write_rom(&address_space_memory, addr,
@ -648,8 +648,8 @@ static void afx_init(hwaddr addr)
SysBusDevice *s;
dev = qdev_new(TYPE_TCX_AFX);
qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, addr);
}
@ -709,8 +709,8 @@ static void prom_init(hwaddr addr, const char *bios_name)
int ret;
dev = qdev_new(TYPE_OPENPROM);
qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, addr);
@ -879,7 +879,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
/* Create and map RAM frontend */
dev = qdev_new("memory");
object_property_set_link(OBJECT(dev), ram_memdev, "memdev", &error_fatal);
qdev_realize_and_unref(dev, NULL, &error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0);
/* models without ECC don't trap when missing ram is accessed */
@ -990,8 +990,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
qdev_prop_set_chr(dev, "chrA", NULL);
qdev_prop_set_uint32(dev, "chnBtype", escc_mouse);
qdev_prop_set_uint32(dev, "chnAtype", escc_kbd);
qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
sysbus_connect_irq(s, 0, slavio_irq[14]);
sysbus_connect_irq(s, 1, slavio_irq[14]);
sysbus_mmio_map(s, 0, hwdef->ms_kb_base);
@ -1004,9 +1004,9 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
qdev_prop_set_chr(dev, "chrA", serial_hd(0));
qdev_prop_set_uint32(dev, "chnBtype", escc_serial);
qdev_prop_set_uint32(dev, "chnAtype", escc_serial);
qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
sysbus_connect_irq(s, 0, slavio_irq[15]);
sysbus_connect_irq(s, 1, slavio_irq[15]);
sysbus_mmio_map(s, 0, hwdef->serial_base);
@ -1068,8 +1068,8 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef,
qdev_prop_set_bit(dev, "dma_enabled", false);
object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
OBJECT(fw_cfg));
qdev_realize_and_unref(dev, NULL, &error_fatal);
s = SYS_BUS_DEVICE(dev);
sysbus_realize_and_unref(s, &error_fatal);
sysbus_mmio_map(s, 0, CFG_ADDR);
sysbus_mmio_map(s, 1, CFG_ADDR + 2);