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Fix PPCEMB for 32bit hosts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3059 c046a42c-6fe2-441c-8c8c-71466251a162
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2 changed files with 6 additions and 6 deletions
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@ -43,15 +43,15 @@ register unsigned long T1 asm(AREG2);
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register unsigned long T2 asm(AREG3);
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#endif
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/* We may, sometime, need 64 bits registers on 32 bits target */
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#if defined(TARGET_PPC64) || defined(TARGET_PPCEMB) || (HOST_LONG_BITS == 64)
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#define T0_64 T0
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#define T1_64 T1
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#define T2_64 T2
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#else
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#if TARGET_GPR_BITS > HOST_LONG_BITS
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/* no registers can be used */
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#define T0_64 (env->t0)
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#define T1_64 (env->t1)
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#define T2_64 (env->t2)
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#else
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#define T0_64 T0
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#define T1_64 T1
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#define T2_64 T2
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#endif
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/* Provision for Altivec */
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#define T0_avr (env->t0_avr)
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