motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-09 10:34:58 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

ppc/ppc405: Introduce a PPC405 SoC

Browse source 
It is an initial model to start QOMification of the PPC405 board.
QOM'ified devices will be reintroduced one by one. Start with the
memory regions, which name prefix is changed to "ppc405".

Also, initialize only one RAM bank. The second bank is a dummy one
(zero size) which is here to match the hard coded number of banks in
ppc405ep_init().

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <20220809153904.485018-6-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
Cédric Le Goater 2022-08-09 17:38:45 +02:00 • committed by Daniel Henrique Barboza
parent df2372086f
commit 3b758ca2f0
3 changed files with 68 additions and 11 deletions
Download patch file Download diff file Expand all files Collapse all files

40
hw/ppc/ppc405_uc.c
View file

@ -30,6 +30,7 @@
#include "hw/ppc/ppc.h"
#include "hw/i2c/ppc4xx_i2c.h"
#include "hw/irq.h"
#include "hw/qdev-properties.h"
#include "ppc405.h"
#include "hw/char/serial.h"
#include "qemu/timer.h"
@ -1530,3 +1531,42 @@ PowerPCCPU *ppc405ep_init(MemoryRegion *address_space_mem,
return cpu;
}
static void ppc405_soc_realize(DeviceState *dev, Error **errp)
{
Ppc405SoCState *s = PPC405_SOC(dev);
/* Initialize only one bank */
s->ram_bases[0] = 0;
s->ram_sizes[0] = s->ram_size;
memory_region_init_alias(&s->ram_banks[0], OBJECT(s),
"ppc405.sdram0", s->dram_mr,
s->ram_bases[0], s->ram_sizes[0]);
}
static Property ppc405_soc_properties[] = {
DEFINE_PROP_LINK("dram", Ppc405SoCState, dram_mr, TYPE_MEMORY_REGION,
MemoryRegion *),
DEFINE_PROP_UINT64("ram-size", Ppc405SoCState, ram_size, 0),
DEFINE_PROP_END_OF_LIST(),
};
static void ppc405_soc_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = ppc405_soc_realize;
dc->user_creatable = false;
device_class_set_props(dc, ppc405_soc_properties);
}
static const TypeInfo ppc405_types[] = {
{
.name = TYPE_PPC405_SOC,
.parent = TYPE_DEVICE,
.instance_size = sizeof(Ppc405SoCState),
.class_init = ppc405_soc_class_init,
}
};
DEFINE_TYPES(ppc405_types)