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hw/pci-bridge/pxb-cxl: Drop RAS capability from host bridge.

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This CXL component isn't allowed to have a RAS capability.
Whilst this should be harmless as software is not expected to look
here, good to clean it up.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20240215155206.2736-1-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Jonathan Cameron 2024-02-15 15:52:06 +00:00 • committed by Michael S. Tsirkin
parent a8516e5c97
commit 3a95f57211
3 changed files with 19 additions and 5 deletions
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1
include/hw/cxl/cxl_component.h
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@ -25,6 +25,7 @@ enum reg_type {
CXL2_TYPE3_DEVICE,
CXL2_LOGICAL_DEVICE,
CXL2_ROOT_PORT,
CXL2_RC,
CXL2_UPSTREAM_PORT,
CXL2_DOWNSTREAM_PORT,
CXL3_SWITCH_MAILBOX_CCI,