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target/ppc: Use tcg_gen_addcio_tl for ADD and SUBF

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Tested-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2025-01-18 01:55:11 -08:00
parent 02b9d791be
commit 3a6ec7d71a
1 changed files with 4 additions and 7 deletions
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11
target/ppc/translate.c
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@ -1746,11 +1746,10 @@ static inline void gen_op_arith_add(DisasContext *ctx, TCGv ret, TCGv arg1,
tcg_gen_mov_tl(ca32, ca); tcg_gen_mov_tl(ca32, ca);
} }
} else { } else {
TCGv zero = tcg_constant_tl(0);
if (add_ca) { if (add_ca) {
tcg_gen_add2_tl(t0, ca, arg1, zero, ca, zero); tcg_gen_addcio_tl(t0, ca, arg1, arg2, ca);
tcg_gen_add2_tl(t0, ca, t0, ca, arg2, zero);
} else { } else {
TCGv zero = tcg_constant_tl(0);
tcg_gen_add2_tl(t0, ca, arg1, zero, arg2, zero); tcg_gen_add2_tl(t0, ca, arg1, zero, arg2, zero);
} }
gen_op_arith_compute_ca32(ctx, t0, arg1, arg2, ca32, 0); gen_op_arith_compute_ca32(ctx, t0, arg1, arg2, ca32, 0);
@ -1949,11 +1948,9 @@ static inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv arg1,
tcg_gen_mov_tl(cpu_ca32, cpu_ca); tcg_gen_mov_tl(cpu_ca32, cpu_ca);
} }
} else if (add_ca) { } else if (add_ca) {
TCGv zero, inv1 = tcg_temp_new(); TCGv inv1 = tcg_temp_new();
tcg_gen_not_tl(inv1, arg1); tcg_gen_not_tl(inv1, arg1);
zero = tcg_constant_tl(0); tcg_gen_addcio_tl(t0, cpu_ca, arg2, inv1, cpu_ca);
tcg_gen_add2_tl(t0, cpu_ca, arg2, zero, cpu_ca, zero);
tcg_gen_add2_tl(t0, cpu_ca, t0, cpu_ca, inv1, zero);
gen_op_arith_compute_ca32(ctx, t0, inv1, arg2, cpu_ca32, 0); gen_op_arith_compute_ca32(ctx, t0, inv1, arg2, cpu_ca32, 0);
} else { } else {
tcg_gen_setcond_tl(TCG_COND_GEU, cpu_ca, arg2, arg1); tcg_gen_setcond_tl(TCG_COND_GEU, cpu_ca, arg2, arg1);