mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-05 00:33:55 -06:00
target/arm: Reject add/sub w/ shifted byte early
Remove the unparsed extractions in trans_ADD_zzi, trans_SUBR_zzi, and do_zzi_sat which are intended to reject an 8-bit shift of an 8-bit constant for 8-bit element. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220527181907.189259-73-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
c437c59ba1
commit
3a40518079
2 changed files with 28 additions and 16 deletions
|
@ -793,13 +793,34 @@ FDUP 00100101 esz:2 111 00 1110 imm:8 rd:5
|
|||
}
|
||||
|
||||
# SVE integer add/subtract immediate (unpredicated)
|
||||
ADD_zzi 00100101 .. 100 000 11 . ........ ..... @rdn_sh_i8u
|
||||
SUB_zzi 00100101 .. 100 001 11 . ........ ..... @rdn_sh_i8u
|
||||
SUBR_zzi 00100101 .. 100 011 11 . ........ ..... @rdn_sh_i8u
|
||||
SQADD_zzi 00100101 .. 100 100 11 . ........ ..... @rdn_sh_i8u
|
||||
UQADD_zzi 00100101 .. 100 101 11 . ........ ..... @rdn_sh_i8u
|
||||
SQSUB_zzi 00100101 .. 100 110 11 . ........ ..... @rdn_sh_i8u
|
||||
UQSUB_zzi 00100101 .. 100 111 11 . ........ ..... @rdn_sh_i8u
|
||||
{
|
||||
INVALID 00100101 00 100 000 11 1 -------- -----
|
||||
ADD_zzi 00100101 .. 100 000 11 . ........ ..... @rdn_sh_i8u
|
||||
}
|
||||
{
|
||||
INVALID 00100101 00 100 001 11 1 -------- -----
|
||||
SUB_zzi 00100101 .. 100 001 11 . ........ ..... @rdn_sh_i8u
|
||||
}
|
||||
{
|
||||
INVALID 00100101 00 100 011 11 1 -------- -----
|
||||
SUBR_zzi 00100101 .. 100 011 11 . ........ ..... @rdn_sh_i8u
|
||||
}
|
||||
{
|
||||
INVALID 00100101 00 100 100 11 1 -------- -----
|
||||
SQADD_zzi 00100101 .. 100 100 11 . ........ ..... @rdn_sh_i8u
|
||||
}
|
||||
{
|
||||
INVALID 00100101 00 100 101 11 1 -------- -----
|
||||
UQADD_zzi 00100101 .. 100 101 11 . ........ ..... @rdn_sh_i8u
|
||||
}
|
||||
{
|
||||
INVALID 00100101 00 100 110 11 1 -------- -----
|
||||
SQSUB_zzi 00100101 .. 100 110 11 . ........ ..... @rdn_sh_i8u
|
||||
}
|
||||
{
|
||||
INVALID 00100101 00 100 111 11 1 -------- -----
|
||||
UQSUB_zzi 00100101 .. 100 111 11 . ........ ..... @rdn_sh_i8u
|
||||
}
|
||||
|
||||
# SVE integer min/max immediate (unpredicated)
|
||||
SMAX_zzi 00100101 .. 101 000 110 ........ ..... @rdn_i8s
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue