mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-04 00:03:54 -06:00
hw/intc/arm_gicv3: Use correct number of priority bits for the CPU
Make the GICv3 set its number of bits of physical priority from the implementation-specific value provided in the CPU state struct, in the same way we already do for virtual priority bits. Because this would be a migration compatibility break, we provide a property force-8-bit-prio which is enabled for 7.0 and earlier versioned board models to retain the legacy "always use 8 bits" behaviour. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220512151457.3899052-6-peter.maydell@linaro.org Message-id: 20220506162129.2896966-5-peter.maydell@linaro.org
This commit is contained in:
parent
84597ff394
commit
39f29e5993
6 changed files with 27 additions and 5 deletions
|
@ -41,7 +41,9 @@
|
|||
#include "hw/virtio/virtio-pci.h"
|
||||
#include "qom/object_interfaces.h"
|
||||
|
||||
GlobalProperty hw_compat_7_0[] = {};
|
||||
GlobalProperty hw_compat_7_0[] = {
|
||||
{ "arm-gicv3-common", "force-8-bit-prio", "on" },
|
||||
};
|
||||
const size_t hw_compat_7_0_len = G_N_ELEMENTS(hw_compat_7_0);
|
||||
|
||||
GlobalProperty hw_compat_6_2[] = {
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue