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qdev: register all types natively through QEMU Object Model

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This was done in a mostly automated fashion.  I did it in three steps and then
rebased it into a single step which avoids repeatedly touching every file in
the tree.

The first step was a sed-based addition of the parent type to the subclass
registration functions.

The second step was another sed-based removal of subclass registration functions
while also adding virtual functions from the base class into a class_init
function as appropriate.

Finally, a python script was used to convert the DeviceInfo structures and
qdev_register_subclass functions to TypeInfo structures, class_init functions,
and type_register_static calls.

We are almost fully converted to QOM after this commit.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Anthony Liguori 2011-12-07 21:34:16 -06:00
parent 212ad11168
commit 39bffca203
243 changed files with 3169 additions and 2543 deletions
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98
hw/strongarm.c
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@ -203,17 +203,19 @@ static VMStateDescription vmstate_strongarm_pic_regs = {
static void strongarm_pic_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = strongarm_pic_initfn;
dc->desc = "StrongARM PIC";
dc->vmsd = &vmstate_strongarm_pic_regs;
}
static DeviceInfo strongarm_pic_info = {
.name = "strongarm_pic",
.desc = "StrongARM PIC",
.size = sizeof(StrongARMPICState),
.vmsd = &vmstate_strongarm_pic_regs,
.class_init = strongarm_pic_class_init,
static TypeInfo strongarm_pic_info = {
.name = "strongarm_pic",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(StrongARMPICState),
.class_init = strongarm_pic_class_init,
};
/* Real-Time Clock */
@ -422,17 +424,19 @@ static const VMStateDescription vmstate_strongarm_rtc_regs = {
static void strongarm_rtc_sysbus_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = strongarm_rtc_init;
dc->desc = "StrongARM RTC Controller";
dc->vmsd = &vmstate_strongarm_rtc_regs;
}
static DeviceInfo strongarm_rtc_sysbus_info = {
.name = "strongarm-rtc",
.desc = "StrongARM RTC Controller",
.size = sizeof(StrongARMRTCState),
.vmsd = &vmstate_strongarm_rtc_regs,
.class_init = strongarm_rtc_sysbus_class_init,
static TypeInfo strongarm_rtc_sysbus_info = {
.name = "strongarm-rtc",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(StrongARMRTCState),
.class_init = strongarm_rtc_sysbus_class_init,
};
/* GPIO */
@ -662,16 +666,18 @@ static const VMStateDescription vmstate_strongarm_gpio_regs = {
static void strongarm_gpio_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = strongarm_gpio_initfn;
dc->desc = "StrongARM GPIO controller";
}
static DeviceInfo strongarm_gpio_info = {
.name = "strongarm-gpio",
.desc = "StrongARM GPIO controller",
.size = sizeof(StrongARMGPIOInfo),
.class_init = strongarm_gpio_class_init,
static TypeInfo strongarm_gpio_info = {
.name = "strongarm-gpio",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(StrongARMGPIOInfo),
.class_init = strongarm_gpio_class_init,
};
/* Peripheral Pin Controller */
@ -826,16 +832,18 @@ static const VMStateDescription vmstate_strongarm_ppc_regs = {
static void strongarm_ppc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = strongarm_ppc_init;
dc->desc = "StrongARM PPC controller";
}
static DeviceInfo strongarm_ppc_info = {
.name = "strongarm-ppc",
.desc = "StrongARM PPC controller",
.size = sizeof(StrongARMPPCInfo),
.class_init = strongarm_ppc_class_init,
static TypeInfo strongarm_ppc_info = {
.name = "strongarm-ppc",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(StrongARMPPCInfo),
.class_init = strongarm_ppc_class_init,
};
/* UART Ports */
@ -1280,19 +1288,21 @@ static Property strongarm_uart_properties[] = {
static void strongarm_uart_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = strongarm_uart_init;
dc->desc = "StrongARM UART controller";
dc->reset = strongarm_uart_reset;
dc->vmsd = &vmstate_strongarm_uart_regs;
dc->props = strongarm_uart_properties;
}
static DeviceInfo strongarm_uart_info = {
.name = "strongarm-uart",
.desc = "StrongARM UART controller",
.size = sizeof(StrongARMUARTState),
.reset = strongarm_uart_reset,
.vmsd = &vmstate_strongarm_uart_regs,
.props = strongarm_uart_properties,
.class_init = strongarm_uart_class_init,
static TypeInfo strongarm_uart_info = {
.name = "strongarm-uart",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(StrongARMUARTState),
.class_init = strongarm_uart_class_init,
};
/* Synchronous Serial Ports */
@ -1518,18 +1528,20 @@ static const VMStateDescription vmstate_strongarm_ssp_regs = {
static void strongarm_ssp_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = strongarm_ssp_init;
dc->desc = "StrongARM SSP controller";
dc->reset = strongarm_ssp_reset;
dc->vmsd = &vmstate_strongarm_ssp_regs;
}
static DeviceInfo strongarm_ssp_info = {
.name = "strongarm-ssp",
.desc = "StrongARM SSP controller",
.size = sizeof(StrongARMSSPState),
.reset = strongarm_ssp_reset,
.vmsd = &vmstate_strongarm_ssp_regs,
.class_init = strongarm_ssp_class_init,
static TypeInfo strongarm_ssp_info = {
.name = "strongarm-ssp",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(StrongARMSSPState),
.class_init = strongarm_ssp_class_init,
};
/* Main CPU functions */
@ -1599,11 +1611,11 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem,
static void strongarm_register_devices(void)
{
sysbus_register_withprop(&strongarm_pic_info);
sysbus_register_withprop(&strongarm_rtc_sysbus_info);
sysbus_register_withprop(&strongarm_gpio_info);
sysbus_register_withprop(&strongarm_ppc_info);
sysbus_register_withprop(&strongarm_uart_info);
sysbus_register_withprop(&strongarm_ssp_info);
type_register_static(&strongarm_pic_info);
type_register_static(&strongarm_rtc_sysbus_info);
type_register_static(&strongarm_gpio_info);
type_register_static(&strongarm_ppc_info);
type_register_static(&strongarm_uart_info);
type_register_static(&strongarm_ssp_info);
}
device_init(strongarm_register_devices)