mirror of
https://github.com/Motorhead1991/qemu.git
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target/loongarch: Implement LSX fpu fcvt instructions
This patch includes:
- VFCVT{L/H}.{S.H/D.S};
- VFCVT.{H.S/S.D};
- VFRINT[{RNE/RZ/RP/RM}].{S/D};
- VFTINT[{RNE/RZ/RP/RM}].{W.S/L.D};
- VFTINT[RZ].{WU.S/LU.D};
- VFTINT[{RNE/RZ/RP/RM}].W.D;
- VFTINT[{RNE/RZ/RP/RM}]{L/H}.L.S;
- VFFINT.{S.W/D.L}[U];
- VFFINT.S.L, VFFINT{L/H}.D.W.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230504122810.4094787-35-gaosong@loongson.cn>
This commit is contained in:
Song Gao
parent
aca67472d2
commit
399665d2af
5 changed files with 600 additions and 0 deletions
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@ -2246,3 +2246,379 @@ DO_2OP_F(vfrecip_s, 32, UW, do_frecip_32)
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DO_2OP_F(vfrecip_d, 64, UD, do_frecip_64)
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DO_2OP_F(vfrsqrt_s, 32, UW, do_frsqrt_32)
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DO_2OP_F(vfrsqrt_d, 64, UD, do_frsqrt_64)
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static uint32_t float16_cvt_float32(uint16_t h, float_status *status)
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{
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return float16_to_float32(h, true, status);
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}
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static uint64_t float32_cvt_float64(uint32_t s, float_status *status)
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{
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return float32_to_float64(s, status);
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}
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static uint16_t float32_cvt_float16(uint32_t s, float_status *status)
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{
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return float32_to_float16(s, true, status);
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}
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static uint32_t float64_cvt_float32(uint64_t d, float_status *status)
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{
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return float64_to_float32(d, status);
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}
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void HELPER(vfcvtl_s_h)(CPULoongArchState *env, uint32_t vd, uint32_t vj)
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{
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int i;
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VReg temp;
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VReg *Vd = &(env->fpr[vd].vreg);
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VReg *Vj = &(env->fpr[vj].vreg);
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vec_clear_cause(env);
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for (i = 0; i < LSX_LEN/32; i++) {
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temp.UW(i) = float16_cvt_float32(Vj->UH(i), &env->fp_status);
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vec_update_fcsr0(env, GETPC());
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}
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*Vd = temp;
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}
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void HELPER(vfcvtl_d_s)(CPULoongArchState *env, uint32_t vd, uint32_t vj)
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{
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int i;
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VReg temp;
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VReg *Vd = &(env->fpr[vd].vreg);
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VReg *Vj = &(env->fpr[vj].vreg);
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vec_clear_cause(env);
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for (i = 0; i < LSX_LEN/64; i++) {
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temp.UD(i) = float32_cvt_float64(Vj->UW(i), &env->fp_status);
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vec_update_fcsr0(env, GETPC());
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}
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*Vd = temp;
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}
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void HELPER(vfcvth_s_h)(CPULoongArchState *env, uint32_t vd, uint32_t vj)
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{
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int i;
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VReg temp;
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VReg *Vd = &(env->fpr[vd].vreg);
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VReg *Vj = &(env->fpr[vj].vreg);
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vec_clear_cause(env);
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for (i = 0; i < LSX_LEN/32; i++) {
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temp.UW(i) = float16_cvt_float32(Vj->UH(i + 4), &env->fp_status);
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vec_update_fcsr0(env, GETPC());
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}
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*Vd = temp;
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}
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void HELPER(vfcvth_d_s)(CPULoongArchState *env, uint32_t vd, uint32_t vj)
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{
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int i;
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VReg temp;
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VReg *Vd = &(env->fpr[vd].vreg);
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VReg *Vj = &(env->fpr[vj].vreg);
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vec_clear_cause(env);
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for (i = 0; i < LSX_LEN/64; i++) {
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temp.UD(i) = float32_cvt_float64(Vj->UW(i + 2), &env->fp_status);
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vec_update_fcsr0(env, GETPC());
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}
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*Vd = temp;
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}
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void HELPER(vfcvt_h_s)(CPULoongArchState *env,
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uint32_t vd, uint32_t vj, uint32_t vk)
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{
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int i;
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VReg temp;
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VReg *Vd = &(env->fpr[vd].vreg);
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VReg *Vj = &(env->fpr[vj].vreg);
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VReg *Vk = &(env->fpr[vk].vreg);
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vec_clear_cause(env);
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for(i = 0; i < LSX_LEN/32; i++) {
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temp.UH(i + 4) = float32_cvt_float16(Vj->UW(i), &env->fp_status);
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temp.UH(i) = float32_cvt_float16(Vk->UW(i), &env->fp_status);
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vec_update_fcsr0(env, GETPC());
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}
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*Vd = temp;
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}
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void HELPER(vfcvt_s_d)(CPULoongArchState *env,
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uint32_t vd, uint32_t vj, uint32_t vk)
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{
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int i;
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VReg temp;
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VReg *Vd = &(env->fpr[vd].vreg);
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VReg *Vj = &(env->fpr[vj].vreg);
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VReg *Vk = &(env->fpr[vk].vreg);
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vec_clear_cause(env);
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for(i = 0; i < LSX_LEN/64; i++) {
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temp.UW(i + 2) = float64_cvt_float32(Vj->UD(i), &env->fp_status);
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temp.UW(i) = float64_cvt_float32(Vk->UD(i), &env->fp_status);
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vec_update_fcsr0(env, GETPC());
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}
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*Vd = temp;
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}
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void HELPER(vfrint_s)(CPULoongArchState *env, uint32_t vd, uint32_t vj)
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{
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int i;
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VReg *Vd = &(env->fpr[vd].vreg);
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VReg *Vj = &(env->fpr[vj].vreg);
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vec_clear_cause(env);
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for (i = 0; i < 4; i++) {
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Vd->W(i) = float32_round_to_int(Vj->UW(i), &env->fp_status);
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vec_update_fcsr0(env, GETPC());
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}
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}
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void HELPER(vfrint_d)(CPULoongArchState *env, uint32_t vd, uint32_t vj)
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{
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int i;
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VReg *Vd = &(env->fpr[vd].vreg);
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VReg *Vj = &(env->fpr[vj].vreg);
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vec_clear_cause(env);
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for (i = 0; i < 2; i++) {
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Vd->D(i) = float64_round_to_int(Vj->UD(i), &env->fp_status);
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vec_update_fcsr0(env, GETPC());
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}
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}
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#define FCVT_2OP(NAME, BIT, E, MODE) \
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void HELPER(NAME)(CPULoongArchState *env, uint32_t vd, uint32_t vj) \
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{ \
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int i; \
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VReg *Vd = &(env->fpr[vd].vreg); \
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VReg *Vj = &(env->fpr[vj].vreg); \
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\
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vec_clear_cause(env); \
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for (i = 0; i < LSX_LEN/BIT; i++) { \
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FloatRoundMode old_mode = get_float_rounding_mode(&env->fp_status); \
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set_float_rounding_mode(MODE, &env->fp_status); \
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Vd->E(i) = float## BIT ## _round_to_int(Vj->E(i), &env->fp_status); \
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set_float_rounding_mode(old_mode, &env->fp_status); \
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vec_update_fcsr0(env, GETPC()); \
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} \
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}
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FCVT_2OP(vfrintrne_s, 32, UW, float_round_nearest_even)
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FCVT_2OP(vfrintrne_d, 64, UD, float_round_nearest_even)
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FCVT_2OP(vfrintrz_s, 32, UW, float_round_to_zero)
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FCVT_2OP(vfrintrz_d, 64, UD, float_round_to_zero)
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FCVT_2OP(vfrintrp_s, 32, UW, float_round_up)
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FCVT_2OP(vfrintrp_d, 64, UD, float_round_up)
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FCVT_2OP(vfrintrm_s, 32, UW, float_round_down)
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FCVT_2OP(vfrintrm_d, 64, UD, float_round_down)
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#define FTINT(NAME, FMT1, FMT2, T1, T2, MODE) \
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static T2 do_ftint ## NAME(CPULoongArchState *env, T1 fj) \
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{ \
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T2 fd; \
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FloatRoundMode old_mode = get_float_rounding_mode(&env->fp_status); \
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\
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set_float_rounding_mode(MODE, &env->fp_status); \
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fd = do_## FMT1 ##_to_## FMT2(env, fj); \
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set_float_rounding_mode(old_mode, &env->fp_status); \
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return fd; \
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}
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#define DO_FTINT(FMT1, FMT2, T1, T2) \
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static T2 do_## FMT1 ##_to_## FMT2(CPULoongArchState *env, T1 fj) \
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{ \
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T2 fd; \
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\
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fd = FMT1 ##_to_## FMT2(fj, &env->fp_status); \
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if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) { \
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if (FMT1 ##_is_any_nan(fj)) { \
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fd = 0; \
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} \
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} \
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vec_update_fcsr0(env, GETPC()); \
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return fd; \
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}
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DO_FTINT(float32, int32, uint32_t, uint32_t)
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DO_FTINT(float64, int64, uint64_t, uint64_t)
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DO_FTINT(float32, uint32, uint32_t, uint32_t)
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DO_FTINT(float64, uint64, uint64_t, uint64_t)
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DO_FTINT(float64, int32, uint64_t, uint32_t)
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DO_FTINT(float32, int64, uint32_t, uint64_t)
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FTINT(rne_w_s, float32, int32, uint32_t, uint32_t, float_round_nearest_even)
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FTINT(rne_l_d, float64, int64, uint64_t, uint64_t, float_round_nearest_even)
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FTINT(rp_w_s, float32, int32, uint32_t, uint32_t, float_round_up)
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FTINT(rp_l_d, float64, int64, uint64_t, uint64_t, float_round_up)
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FTINT(rz_w_s, float32, int32, uint32_t, uint32_t, float_round_to_zero)
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FTINT(rz_l_d, float64, int64, uint64_t, uint64_t, float_round_to_zero)
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FTINT(rm_w_s, float32, int32, uint32_t, uint32_t, float_round_down)
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FTINT(rm_l_d, float64, int64, uint64_t, uint64_t, float_round_down)
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DO_2OP_F(vftintrne_w_s, 32, UW, do_ftintrne_w_s)
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DO_2OP_F(vftintrne_l_d, 64, UD, do_ftintrne_l_d)
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DO_2OP_F(vftintrp_w_s, 32, UW, do_ftintrp_w_s)
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DO_2OP_F(vftintrp_l_d, 64, UD, do_ftintrp_l_d)
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DO_2OP_F(vftintrz_w_s, 32, UW, do_ftintrz_w_s)
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DO_2OP_F(vftintrz_l_d, 64, UD, do_ftintrz_l_d)
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DO_2OP_F(vftintrm_w_s, 32, UW, do_ftintrm_w_s)
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DO_2OP_F(vftintrm_l_d, 64, UD, do_ftintrm_l_d)
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DO_2OP_F(vftint_w_s, 32, UW, do_float32_to_int32)
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DO_2OP_F(vftint_l_d, 64, UD, do_float64_to_int64)
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FTINT(rz_wu_s, float32, uint32, uint32_t, uint32_t, float_round_to_zero)
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FTINT(rz_lu_d, float64, uint64, uint64_t, uint64_t, float_round_to_zero)
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DO_2OP_F(vftintrz_wu_s, 32, UW, do_ftintrz_wu_s)
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DO_2OP_F(vftintrz_lu_d, 64, UD, do_ftintrz_lu_d)
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DO_2OP_F(vftint_wu_s, 32, UW, do_float32_to_uint32)
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DO_2OP_F(vftint_lu_d, 64, UD, do_float64_to_uint64)
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FTINT(rm_w_d, float64, int32, uint64_t, uint32_t, float_round_down)
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FTINT(rp_w_d, float64, int32, uint64_t, uint32_t, float_round_up)
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FTINT(rz_w_d, float64, int32, uint64_t, uint32_t, float_round_to_zero)
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FTINT(rne_w_d, float64, int32, uint64_t, uint32_t, float_round_nearest_even)
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#define FTINT_W_D(NAME, FN) \
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void HELPER(NAME)(CPULoongArchState *env, \
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uint32_t vd, uint32_t vj, uint32_t vk) \
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{ \
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int i; \
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VReg temp; \
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VReg *Vd = &(env->fpr[vd].vreg); \
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VReg *Vj = &(env->fpr[vj].vreg); \
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VReg *Vk = &(env->fpr[vk].vreg); \
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\
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vec_clear_cause(env); \
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for (i = 0; i < 2; i++) { \
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temp.W(i + 2) = FN(env, Vj->UD(i)); \
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temp.W(i) = FN(env, Vk->UD(i)); \
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} \
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*Vd = temp; \
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}
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FTINT_W_D(vftint_w_d, do_float64_to_int32)
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FTINT_W_D(vftintrm_w_d, do_ftintrm_w_d)
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FTINT_W_D(vftintrp_w_d, do_ftintrp_w_d)
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FTINT_W_D(vftintrz_w_d, do_ftintrz_w_d)
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FTINT_W_D(vftintrne_w_d, do_ftintrne_w_d)
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FTINT(rml_l_s, float32, int64, uint32_t, uint64_t, float_round_down)
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FTINT(rpl_l_s, float32, int64, uint32_t, uint64_t, float_round_up)
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FTINT(rzl_l_s, float32, int64, uint32_t, uint64_t, float_round_to_zero)
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FTINT(rnel_l_s, float32, int64, uint32_t, uint64_t, float_round_nearest_even)
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FTINT(rmh_l_s, float32, int64, uint32_t, uint64_t, float_round_down)
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FTINT(rph_l_s, float32, int64, uint32_t, uint64_t, float_round_up)
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FTINT(rzh_l_s, float32, int64, uint32_t, uint64_t, float_round_to_zero)
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FTINT(rneh_l_s, float32, int64, uint32_t, uint64_t, float_round_nearest_even)
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#define FTINTL_L_S(NAME, FN) \
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void HELPER(NAME)(CPULoongArchState *env, uint32_t vd, uint32_t vj) \
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{ \
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int i; \
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VReg temp; \
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VReg *Vd = &(env->fpr[vd].vreg); \
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VReg *Vj = &(env->fpr[vj].vreg); \
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\
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vec_clear_cause(env); \
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for (i = 0; i < 2; i++) { \
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temp.D(i) = FN(env, Vj->UW(i)); \
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} \
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*Vd = temp; \
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}
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FTINTL_L_S(vftintl_l_s, do_float32_to_int64)
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FTINTL_L_S(vftintrml_l_s, do_ftintrml_l_s)
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FTINTL_L_S(vftintrpl_l_s, do_ftintrpl_l_s)
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FTINTL_L_S(vftintrzl_l_s, do_ftintrzl_l_s)
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FTINTL_L_S(vftintrnel_l_s, do_ftintrnel_l_s)
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#define FTINTH_L_S(NAME, FN) \
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void HELPER(NAME)(CPULoongArchState *env, uint32_t vd, uint32_t vj) \
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{ \
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int i; \
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VReg temp; \
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VReg *Vd = &(env->fpr[vd].vreg); \
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VReg *Vj = &(env->fpr[vj].vreg); \
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\
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vec_clear_cause(env); \
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for (i = 0; i < 2; i++) { \
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temp.D(i) = FN(env, Vj->UW(i + 2)); \
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} \
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*Vd = temp; \
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}
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FTINTH_L_S(vftinth_l_s, do_float32_to_int64)
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FTINTH_L_S(vftintrmh_l_s, do_ftintrmh_l_s)
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FTINTH_L_S(vftintrph_l_s, do_ftintrph_l_s)
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FTINTH_L_S(vftintrzh_l_s, do_ftintrzh_l_s)
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FTINTH_L_S(vftintrneh_l_s, do_ftintrneh_l_s)
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#define FFINT(NAME, FMT1, FMT2, T1, T2) \
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static T2 do_ffint_ ## NAME(CPULoongArchState *env, T1 fj) \
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{ \
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T2 fd; \
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\
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fd = FMT1 ##_to_## FMT2(fj, &env->fp_status); \
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vec_update_fcsr0(env, GETPC()); \
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return fd; \
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}
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FFINT(s_w, int32, float32, int32_t, uint32_t)
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FFINT(d_l, int64, float64, int64_t, uint64_t)
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FFINT(s_wu, uint32, float32, uint32_t, uint32_t)
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FFINT(d_lu, uint64, float64, uint64_t, uint64_t)
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DO_2OP_F(vffint_s_w, 32, W, do_ffint_s_w)
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DO_2OP_F(vffint_d_l, 64, D, do_ffint_d_l)
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DO_2OP_F(vffint_s_wu, 32, UW, do_ffint_s_wu)
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DO_2OP_F(vffint_d_lu, 64, UD, do_ffint_d_lu)
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void HELPER(vffintl_d_w)(CPULoongArchState *env, uint32_t vd, uint32_t vj)
|
||||
{
|
||||
int i;
|
||||
VReg temp;
|
||||
VReg *Vd = &(env->fpr[vd].vreg);
|
||||
VReg *Vj = &(env->fpr[vj].vreg);
|
||||
|
||||
vec_clear_cause(env);
|
||||
for (i = 0; i < 2; i++) {
|
||||
temp.D(i) = int32_to_float64(Vj->W(i), &env->fp_status);
|
||||
vec_update_fcsr0(env, GETPC());
|
||||
}
|
||||
*Vd = temp;
|
||||
}
|
||||
|
||||
void HELPER(vffinth_d_w)(CPULoongArchState *env, uint32_t vd, uint32_t vj)
|
||||
{
|
||||
int i;
|
||||
VReg temp;
|
||||
VReg *Vd = &(env->fpr[vd].vreg);
|
||||
VReg *Vj = &(env->fpr[vj].vreg);
|
||||
|
||||
vec_clear_cause(env);
|
||||
for (i = 0; i < 2; i++) {
|
||||
temp.D(i) = int32_to_float64(Vj->W(i + 2), &env->fp_status);
|
||||
vec_update_fcsr0(env, GETPC());
|
||||
}
|
||||
*Vd = temp;
|
||||
}
|
||||
|
||||
void HELPER(vffint_s_l)(CPULoongArchState *env,
|
||||
uint32_t vd, uint32_t vj, uint32_t vk)
|
||||
{
|
||||
int i;
|
||||
VReg temp;
|
||||
VReg *Vd = &(env->fpr[vd].vreg);
|
||||
VReg *Vj = &(env->fpr[vj].vreg);
|
||||
VReg *Vk = &(env->fpr[vk].vreg);
|
||||
|
||||
vec_clear_cause(env);
|
||||
for (i = 0; i < 2; i++) {
|
||||
temp.W(i + 2) = int64_to_float32(Vj->D(i), &env->fp_status);
|
||||
temp.W(i) = int64_to_float32(Vk->D(i), &env->fp_status);
|
||||
vec_update_fcsr0(env, GETPC());
|
||||
}
|
||||
*Vd = temp;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue