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target/loongarch: Add CSRs definition

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Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-20-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Xiaojuan Yang 2022-06-06 20:43:09 +08:00 • committed by Richard Henderson
parent d88b51dc26
commit 398cecb9c3
3 changed files with 313 additions and 0 deletions
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64
target/loongarch/cpu.h
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@ -172,6 +172,15 @@ FIELD(CPUCFG20, L3IU_WAYS, 0, 16)
FIELD(CPUCFG20, L3IU_SETS, 16, 8)
FIELD(CPUCFG20, L3IU_SIZE, 24, 7)
/*CSR_CRMD */
FIELD(CSR_CRMD, PLV, 0, 2)
FIELD(CSR_CRMD, IE, 2, 1)
FIELD(CSR_CRMD, DA, 3, 1)
FIELD(CSR_CRMD, PG, 4, 1)
FIELD(CSR_CRMD, DATF, 5, 2)
FIELD(CSR_CRMD, DATM, 7, 2)
FIELD(CSR_CRMD, WE, 9, 1)
extern const char * const regnames[32];
extern const char * const fregnames[32];
@ -192,6 +201,61 @@ typedef struct CPUArchState {
uint64_t llval;
uint64_t badaddr;
/* LoongArch CSRs */
uint64_t CSR_CRMD;
uint64_t CSR_PRMD;
uint64_t CSR_EUEN;
uint64_t CSR_MISC;
uint64_t CSR_ECFG;
uint64_t CSR_ESTAT;
uint64_t CSR_ERA;
uint64_t CSR_BADV;
uint64_t CSR_BADI;
uint64_t CSR_EENTRY;
uint64_t CSR_TLBIDX;
uint64_t CSR_TLBEHI;
uint64_t CSR_TLBELO0;
uint64_t CSR_TLBELO1;
uint64_t CSR_ASID;
uint64_t CSR_PGDL;
uint64_t CSR_PGDH;
uint64_t CSR_PGD;
uint64_t CSR_PWCL;
uint64_t CSR_PWCH;
uint64_t CSR_STLBPS;
uint64_t CSR_RVACFG;
uint64_t CSR_PRCFG1;
uint64_t CSR_PRCFG2;
uint64_t CSR_PRCFG3;
uint64_t CSR_SAVE[16];
uint64_t CSR_TID;
uint64_t CSR_TCFG;
uint64_t CSR_TVAL;
uint64_t CSR_CNTC;
uint64_t CSR_TICLR;
uint64_t CSR_LLBCTL;
uint64_t CSR_IMPCTL1;
uint64_t CSR_IMPCTL2;
uint64_t CSR_TLBRENTRY;
uint64_t CSR_TLBRBADV;
uint64_t CSR_TLBRERA;
uint64_t CSR_TLBRSAVE;
uint64_t CSR_TLBRELO0;
uint64_t CSR_TLBRELO1;
uint64_t CSR_TLBREHI;
uint64_t CSR_TLBRPRMD;
uint64_t CSR_MERRCTL;
uint64_t CSR_MERRINFO1;
uint64_t CSR_MERRINFO2;
uint64_t CSR_MERRENTRY;
uint64_t CSR_MERRERA;
uint64_t CSR_MERRSAVE;
uint64_t CSR_CTAG;
uint64_t CSR_DMW[4];
uint64_t CSR_DBG;
uint64_t CSR_DERA;
uint64_t CSR_DSAVE;
} CPULoongArchState;
/**