Add TCG native negation op.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4426 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
pbrook 2008-05-11 14:35:37 +00:00
parent 44cd42ee40
commit 390efc54fb
7 changed files with 50 additions and 16 deletions

View file

@ -203,6 +203,10 @@ t0=t1+t2
t0=t1-t2
* neg_i32/i64 t0, t1
t0=-t1 (two's complement)
* mul_i32/i64 t0, t1, t2
t0=t1*t2

View file

@ -1208,6 +1208,24 @@ static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg)
#endif
static inline void tcg_gen_neg_i32(TCGv ret, TCGv arg)
{
#ifdef TCG_TARGET_HAS_neg_i32
tcg_gen_op2(INDEX_op_neg_i32, ret, arg);
#else
tcg_gen_sub_i32(ret, tcg_const_i32(0), arg);
#endif
}
static inline void tcg_gen_neg_i64(TCGv ret, TCGv arg)
{
#ifdef TCG_TARGET_HAS_neg_i64
tcg_gen_op2(INDEX_op_neg_i64, ret, arg);
#else
tcg_gen_sub_i64(ret, tcg_const_i64(0), arg);
#endif
}
static inline void tcg_gen_discard_i32(TCGv arg)
{
@ -1441,6 +1459,7 @@ static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
#define tcg_gen_add_tl tcg_gen_add_i64
#define tcg_gen_addi_tl tcg_gen_addi_i64
#define tcg_gen_sub_tl tcg_gen_sub_i64
#define tcg_gen_neg_tl tcg_gen_neg_i64
#define tcg_gen_subi_tl tcg_gen_subi_i64
#define tcg_gen_and_tl tcg_gen_and_i64
#define tcg_gen_andi_tl tcg_gen_andi_i64
@ -1483,6 +1502,7 @@ static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
#define tcg_gen_add_tl tcg_gen_add_i32
#define tcg_gen_addi_tl tcg_gen_addi_i32
#define tcg_gen_sub_tl tcg_gen_sub_i32
#define tcg_gen_neg_tl tcg_gen_neg_i32
#define tcg_gen_subi_tl tcg_gen_subi_i32
#define tcg_gen_and_tl tcg_gen_and_i32
#define tcg_gen_andi_tl tcg_gen_andi_i32

View file

@ -148,6 +148,12 @@ DEF2(ext32s_i64, 1, 1, 0, 0)
DEF2(bswap_i64, 1, 1, 0, 0)
#endif
#endif
#ifdef TCG_TARGET_HAS_neg_i32
DEF2(neg_i32, 1, 1, 0, 0)
#endif
#ifdef TCG_TARGET_HAS_neg_i64
DEF2(neg_i64, 1, 1, 0, 0)
#endif
/* QEMU specific */
DEF2(exit_tb, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS)

View file

@ -1092,6 +1092,13 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
tcg_out_opc(s, (0xc8 + (args[0] & 7)) | P_EXT | P_REXW, 0, args[0], 0);
break;
case INDEX_op_neg_i32:
tcg_out_modrm(s, 0xf7, 3, args[0]);
break;
case INDEX_op_neg_i64:
tcg_out_modrm(s, 0xf7 | P_REXW, 3, args[0]);
break;
case INDEX_op_qemu_ld8u:
tcg_out_qemu_ld(s, args, 0);
break;
@ -1247,6 +1254,9 @@ static const TCGTargetOpDef x86_64_op_defs[] = {
{ INDEX_op_bswap_i32, { "r", "0" } },
{ INDEX_op_bswap_i64, { "r", "0" } },
{ INDEX_op_neg_i32, { "r", "0" } },
{ INDEX_op_neg_i64, { "r", "0" } },
{ INDEX_op_qemu_ld8u, { "r", "L" } },
{ INDEX_op_qemu_ld8s, { "r", "L" } },
{ INDEX_op_qemu_ld16u, { "r", "L" } },

View file

@ -57,6 +57,8 @@ enum {
/* optional instructions */
#define TCG_TARGET_HAS_bswap_i32
#define TCG_TARGET_HAS_bswap_i64
#define TCG_TARGET_HAS_neg_i32
#define TCG_TARGET_HAS_neg_i64
/* Note: must be synced with dyngen-exec.h */
#define TCG_AREG0 TCG_REG_R14