motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-04 08:13:54 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

i2c: pm_smbus: Add block transfer capability

Browse source 
There was no block transfer code in pm_smbus.c, and it is needed
for some devices.  So add it.

This adds both byte-by-byte block transfers and buffered block
transfers.

Signed-off-by: Corey Minyard <cminyard@mvista.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <1534796770-10295-5-git-send-email-minyard@acm.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Corey Minyard 2018-08-20 15:26:04 -05:00 • committed by Paolo Bonzini
parent 00bdfeab15
commit 38ad4fae43
3 changed files with 164 additions and 15 deletions
Download patch file Download diff file Expand all files Collapse all files

20
include/hw/i2c/pm_smbus.h
View file

@ -1,6 +1,8 @@
#ifndef PM_SMBUS_H
#define PM_SMBUS_H
#define PM_SMBUS_MAX_MSG_SIZE 32
typedef struct PMSMBus {
I2CBus *smbus;
MemoryRegion io;
@ -11,8 +13,22 @@ typedef struct PMSMBus {
uint8_t smb_addr;
uint8_t smb_data0;
uint8_t smb_data1;
uint8_t smb_data[32];
uint8_t smb_index;
uint8_t smb_data[PM_SMBUS_MAX_MSG_SIZE];
uint8_t smb_blkdata;
uint8_t smb_auxctl;
uint32_t smb_index;
/* Set by pm_smbus.c */
void (*reset)(struct PMSMBus *s);
/* Set by the user. */
bool i2c_enable;
/* Internally used by pm_smbus. */
/* Set on block transfers after the last byte has been read, so the
INTR bit can be set at the right time. */
bool op_done;
} PMSMBus;
void pm_smbus_init(DeviceState *parent, PMSMBus *smb);