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* Record-replay lockstep execution, log dumper and fixes (Alex, Pavel)

Browse source 
* SCSI fix to pass maximum transfer size (Daniel Barboza)
 * chardev fixes and improved iothread support (Daniel Berrangé, Peter)
 * checkpatch tweak (Eric)
 * make help tweak (Marc-André)
 * make more PCI NICs available with -net or -nic (myself)
 * change default q35 NIC to e1000e (myself)
 * SCSI support for NDOB bit (myself)
 * membarrier system call support (myself)
 * SuperIO refactoring (Philippe)
 * miscellaneous cleanups and fixes (Thomas)
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Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Record-replay lockstep execution, log dumper and fixes (Alex, Pavel)
* SCSI fix to pass maximum transfer size (Daniel Barboza)
* chardev fixes and improved iothread support (Daniel Berrangé, Peter)
* checkpatch tweak (Eric)
* make help tweak (Marc-André)
* make more PCI NICs available with -net or -nic (myself)
* change default q35 NIC to e1000e (myself)
* SCSI support for NDOB bit (myself)
* membarrier system call support (myself)
* SuperIO refactoring (Philippe)
* miscellaneous cleanups and fixes (Thomas)

# gpg: Signature made Mon 12 Mar 2018 16:10:52 GMT
# gpg:                using RSA key BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>"
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (69 commits)
  tcg: fix cpu_io_recompile
  replay: update documentation
  replay: save vmstate of the asynchronous events
  replay: don't process async events when warping the clock
  scripts/replay-dump.py: replay log dumper
  replay: avoid recursive call of checkpoints
  replay: check return values of fwrite
  replay: push replay_mutex_lock up the call tree
  replay: don't destroy mutex at exit
  replay: make locking visible outside replay code
  replay/replay-internal.c: track holding of replay_lock
  replay/replay.c: bump REPLAY_VERSION again
  replay: save prior value of the host clock
  replay: added replay log format description
  replay: fix save/load vm for non-empty queue
  replay: fixed replay_enable_events
  replay: fix processing async events
  cpu-exec: fix exception_index handling
  hw/i386/pc: Factor out the superio code
  hw/alpha/dp264: Use the TYPE_SMC37C669_SUPERIO
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	default-configs/i386-softmmu.mak
#	default-configs/x86_64-softmmu.mak
This commit is contained in:
Peter Maydell 2018-03-16 11:05:03 +00:00
commit 3788c7b6e5
117 changed files with 1952 additions and 728 deletions
Download patch file Download diff file Expand all files Collapse all files

2
include/chardev/char-mux.h
View file

@ -27,8 +27,6 @@
#include "chardev/char.h"
#include "chardev/char-fe.h"
extern bool muxes_realized;
#define MAX_MUX 4
#define MUX_BUFFER_SIZE 32 /* Must be a power of 2. */
#define MUX_BUFFER_MASK (MUX_BUFFER_SIZE - 1)

2
include/chardev/char.h
View file

@ -248,6 +248,8 @@ typedef struct ChardevClass {
void (*chr_set_echo)(Chardev *chr, bool echo);
void (*chr_set_fe_open)(Chardev *chr, int fe_open);
void (*chr_be_event)(Chardev *s, int event);
/* Return 0 if succeeded, 1 if failed */
int (*chr_machine_done)(Chardev *chr);
} ChardevClass;
Chardev *qemu_chardev_new(const char *id, const char *typename,

14
include/hw/char/parallel.h Normal file
View file

@ -0,0 +1,14 @@
#ifndef HW_PARALLEL_H
#define HW_PARALLEL_H
#include "exec/memory.h"
#include "hw/isa/isa.h"
#include "chardev/char.h"
void parallel_hds_isa_init(ISABus *bus, int n);
bool parallel_mm_init(MemoryRegion *address_space,
hwaddr base, int it_shift, qemu_irq irq,
Chardev *chr);
#endif

6
include/hw/isa/i8257.h → include/hw/dma/i8257.h
View file

@ -1,6 +1,10 @@
#ifndef HW_I8257_H
#define HW_I8257_H
#include "hw/hw.h"
#include "hw/isa/isa.h"
#include "exec/ioport.h"
#define TYPE_I8257 "i8257"
typedef struct I8257Regs {
@ -40,4 +44,6 @@ typedef struct I8257State {
PortioList portio_pageh;
} I8257State;
void i8257_dma_init(ISABus *bus, bool high_page_enable);
#endif

20
include/hw/i386/pc.h
View file

@ -114,6 +114,7 @@ struct PCMachineClass {
/* Device configuration: */
bool pci_enabled;
bool kvmclock_enabled;
const char *default_nic_model;
/* Compat options: */
@ -151,14 +152,6 @@ struct PCMachineClass {
#define PC_MACHINE_CLASS(klass) \
OBJECT_CLASS_CHECK(PCMachineClass, (klass), TYPE_PC_MACHINE)
/* parallel.c */
void parallel_hds_isa_init(ISABus *bus, int n);
bool parallel_mm_init(MemoryRegion *address_space,
hwaddr base, int it_shift, qemu_irq irq,
Chardev *chr);
/* i8259.c */
extern DeviceState *isa_pic;
@ -196,15 +189,6 @@ void vmport_register(unsigned char command, VMPortReadFunc *func, void *opaque);
void vmmouse_get_data(uint32_t *data);
void vmmouse_set_data(const uint32_t *data);
/* pckbd.c */
#define I8042_A20_LINE "a20"
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
MemoryRegion *region, ram_addr_t size,
hwaddr mask);
void i8042_isa_mouse_fake_event(void *opaque);
void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out);
/* pc.c */
extern int fd_bootchk;
@ -248,7 +232,7 @@ void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
void pc_cmos_init(PCMachineState *pcms,
BusState *ide0, BusState *ide1,
ISADevice *s);
void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus);
void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
void pc_pci_device_init(PCIBus *pci_bus);
typedef void (*cpu_set_smm_t)(int smm, void *arg);

24
include/hw/input/i8042.h Normal file
View file

@ -0,0 +1,24 @@
/*
* QEMU PS/2 Controller
*
* Copyright (c) 2003 Fabrice Bellard
*
* SPDX-License-Identifier: MIT
*/
#ifndef HW_INPUT_I8042_H
#define HW_INPUT_I8042_H
#include "hw/hw.h"
#include "hw/isa/isa.h"
#define TYPE_I8042 "i8042"
#define I8042_A20_LINE "a20"
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
MemoryRegion *region, ram_addr_t size,
hwaddr mask);
void i8042_isa_mouse_fake_event(void *opaque);
void i8042_setup_a20_line(ISADevice *dev, qemu_irq a20_out);
#endif /* HW_INPUT_I8042_H */

2
include/hw/isa/isa.h
View file

@ -151,6 +151,4 @@ static inline ISABus *isa_bus_from_device(ISADevice *d)
return ISA_BUS(qdev_get_parent_bus(DEVICE(d)));
}
/* i8257.c */
void DMA_init(ISABus *bus, int high_page_enable);
#endif

24
include/hw/isa/pc87312.h
View file

@ -25,30 +25,20 @@
#ifndef QEMU_PC87312_H
#define QEMU_PC87312_H
#include "hw/isa/isa.h"
#include "hw/isa/superio.h"
#define TYPE_PC87312 "pc87312"
#define PC87312(obj) OBJECT_CHECK(PC87312State, (obj), TYPE_PC87312)
#define TYPE_PC87312_SUPERIO "pc87312"
#define PC87312(obj) OBJECT_CHECK(PC87312State, (obj), TYPE_PC87312_SUPERIO)
typedef struct PC87312State {
ISADevice dev;
/*< private >*/
ISASuperIODevice parent_dev;
/*< public >*/
uint32_t iobase;
uint16_t iobase;
uint8_t config; /* initial configuration */
struct {
ISADevice *dev;
} parallel;
struct {
ISADevice *dev;
} uart[2];
struct {
ISADevice *dev;
} fdc;
struct {
ISADevice *dev;
} ide;

60
include/hw/isa/superio.h Normal file
View file

@ -0,0 +1,60 @@
/*
* Generic ISA Super I/O
*
* Copyright (c) 2018 Philippe Mathieu-Daudé
*
* This code is licensed under the GNU GPLv2 and later.
* See the COPYING file in the top-level directory.
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef HW_ISA_SUPERIO_H
#define HW_ISA_SUPERIO_H
#include "qemu-common.h"
#include "sysemu/sysemu.h"
#include "hw/isa/isa.h"
#define TYPE_ISA_SUPERIO "isa-superio"
#define ISA_SUPERIO(obj) \
OBJECT_CHECK(ISASuperIODevice, (obj), TYPE_ISA_SUPERIO)
#define ISA_SUPERIO_GET_CLASS(obj) \
OBJECT_GET_CLASS(ISASuperIOClass, (obj), TYPE_ISA_SUPERIO)
#define ISA_SUPERIO_CLASS(klass) \
OBJECT_CLASS_CHECK(ISASuperIOClass, (klass), TYPE_ISA_SUPERIO)
typedef struct ISASuperIODevice {
/*< private >*/
ISADevice parent_obj;
/*< public >*/
ISADevice *parallel[MAX_PARALLEL_PORTS];
ISADevice *serial[MAX_SERIAL_PORTS];
ISADevice *floppy;
ISADevice *kbc;
ISADevice *ide;
} ISASuperIODevice;
typedef struct ISASuperIOFuncs {
size_t count;
bool (*is_enabled)(ISASuperIODevice *sio, uint8_t index);
uint16_t (*get_iobase)(ISASuperIODevice *sio, uint8_t index);
unsigned int (*get_irq)(ISASuperIODevice *sio, uint8_t index);
unsigned int (*get_dma)(ISASuperIODevice *sio, uint8_t index);
} ISASuperIOFuncs;
typedef struct ISASuperIOClass {
/*< private >*/
ISADeviceClass parent_class;
/*< public >*/
DeviceRealize parent_realize;
ISASuperIOFuncs parallel;
ISASuperIOFuncs serial;
ISASuperIOFuncs floppy;
ISASuperIOFuncs ide;
} ISASuperIOClass;
#define TYPE_FDC37M81X_SUPERIO "fdc37m81x-superio"
#define TYPE_SMC37C669_SUPERIO "smc37c669-superio"
#endif /* HW_ISA_SUPERIO_H */

4
include/hw/isa/vt82c686.h
View file

@ -1,8 +1,10 @@
#ifndef HW_VT82C686_H
#define HW_VT82C686_H
#define TYPE_VT82C686B_SUPERIO "vt82c686b-superio"
/* vt82c686.c */
ISABus *vt82c686b_init(PCIBus * bus, int devfn);
ISABus *vt82c686b_isa_init(PCIBus * bus, int devfn);
void vt82c686b_ac97_init(PCIBus *bus, int devfn);
void vt82c686b_mc97_init(PCIBus *bus, int devfn);
I2CBus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,

10
include/hw/scsi/esp.h
View file

@ -7,11 +7,6 @@
/* esp.c */
#define ESP_MAX_DEVS 7
typedef void (*ESPDMAMemoryReadWriteFunc)(void *opaque, uint8_t *buf, int len);
void esp_init(hwaddr espaddr, int it_shift,
ESPDMAMemoryReadWriteFunc dma_memory_read,
ESPDMAMemoryReadWriteFunc dma_memory_write,
void *dma_opaque, qemu_irq irq, qemu_irq *reset,
qemu_irq *dma_enable);
#define ESP_REGS 16
#define TI_BUFSZ 16
@ -136,6 +131,11 @@ typedef struct {
#define TCHI_FAS100A 0x4
#define TCHI_AM53C974 0x12
ESPState *esp_init(hwaddr espaddr, int it_shift,
ESPDMAMemoryReadWriteFunc dma_memory_read,
ESPDMAMemoryReadWriteFunc dma_memory_write,
void *dma_opaque, qemu_irq irq, qemu_irq *reset,
qemu_irq *dma_enable);
void esp_dma_enable(ESPState *s, int irq, int level);
void esp_request_cancelled(SCSIRequest *req);
void esp_command_complete(SCSIRequest *req, uint32_t status, size_t resid);

16
include/qemu/rcu.h
View file

@ -27,6 +27,7 @@
#include "qemu/thread.h"
#include "qemu/queue.h"
#include "qemu/atomic.h"
#include "qemu/sys_membarrier.h"
#ifdef __cplusplus
extern "C" {
@ -79,7 +80,10 @@ static inline void rcu_read_lock(void)
}
ctr = atomic_read(&rcu_gp_ctr);
atomic_xchg(&p_rcu_reader->ctr, ctr);
atomic_set(&p_rcu_reader->ctr, ctr);
/* Write p_rcu_reader->ctr before reading RCU-protected pointers. */
smp_mb_placeholder();
}
static inline void rcu_read_unlock(void)
@ -91,7 +95,15 @@ static inline void rcu_read_unlock(void)
return;
}
atomic_xchg(&p_rcu_reader->ctr, 0);
/* Ensure that the critical section is seen to precede the
* store to p_rcu_reader->ctr. Together with the following
* smp_mb_placeholder(), this ensures writes to p_rcu_reader->ctr
* are sequentially consistent.
*/
atomic_store_release(&p_rcu_reader->ctr, 0);
/* Write p_rcu_reader->ctr before reading p_rcu_reader->waiting. */
smp_mb_placeholder();
if (unlikely(atomic_read(&p_rcu_reader->waiting))) {
atomic_set(&p_rcu_reader->waiting, false);
qemu_event_set(&rcu_gp_event);

27
include/qemu/sys_membarrier.h Normal file
View file

@ -0,0 +1,27 @@
/*
* Process-global memory barriers
*
* Copyright (c) 2018 Red Hat, Inc.
*
* Author: Paolo Bonzini <pbonzini@redhat.com>
*/
#ifndef QEMU_SYS_MEMBARRIER_H
#define QEMU_SYS_MEMBARRIER_H 1
#ifdef CONFIG_MEMBARRIER
/* Only block reordering at the compiler level in the performance-critical
* side. The slow side forces processor-level ordering on all other cores
* through a system call.
*/
extern void smp_mb_global_init(void);
extern void smp_mb_global(void);
#define smp_mb_placeholder() barrier()
#else
/* Keep it simple, execute a real memory barrier on both sides. */
static inline void smp_mb_global_init(void) {}
#define smp_mb_global() smp_mb()
#define smp_mb_placeholder() smp_mb()
#endif
#endif

14
include/qemu/timer.h
View file

@ -251,6 +251,20 @@ bool qemu_clock_run_timers(QEMUClockType type);
*/
bool qemu_clock_run_all_timers(void);
/**
* qemu_clock_get_last:
*
* Returns last clock query time.
*/
uint64_t qemu_clock_get_last(QEMUClockType type);
/**
* qemu_clock_set_last:
*
* Sets last clock query time.
*/
void qemu_clock_set_last(QEMUClockType type, uint64_t last);
/*
* QEMUTimerList
*/

11
include/qom/object.h
View file

@ -913,6 +913,17 @@ void object_class_foreach(void (*fn)(ObjectClass *klass, void *opaque),
GSList *object_class_get_list(const char *implements_type,
bool include_abstract);
/**
* object_class_get_list_sorted:
* @implements_type: The type to filter for, including its derivatives.
* @include_abstract: Whether to include abstract classes.
*
* Returns: A singly-linked list of the classes in alphabetical
* case-insensitive order.
*/
GSList *object_class_get_list_sorted(const char *implements_type,
bool include_abstract);
/**
* object_ref:
* @obj: the object

16
include/sysemu/replay.h
View file

@ -48,6 +48,19 @@ extern ReplayMode replay_mode;
/* Name of the initial VM snapshot */
extern char *replay_snapshot;
/* Replay locking
*
* The locks are needed to protect the shared structures and log file
* when doing record/replay. They also are the main sync-point between
* the main-loop thread and the vCPU thread. This was a role
* previously filled by the BQL which has been busy trying to reduce
* its impact across the code. This ensures blocks of events stay
* sequential and reproducible.
*/
void replay_mutex_lock(void);
void replay_mutex_unlock(void);
/* Replay process control functions */
/*! Enables recording or saving event log with specified parameters */
@ -166,5 +179,8 @@ void replay_audio_in(int *recorded, void *samples, int *wpos, int size);
/*! Called at the start of execution.
Loads or saves initial vmstate depending on execution mode. */
void replay_vmstate_init(void);
/*! Called to ensure that replay state is consistent and VM snapshot
can be created */
bool replay_can_snapshot(void);
#endif

2
include/sysemu/sysemu.h
View file

@ -88,6 +88,8 @@ void qemu_system_guest_panicked(GuestPanicInformation *info);
void qemu_add_exit_notifier(Notifier *notify);
void qemu_remove_exit_notifier(Notifier *notify);
extern bool machine_init_done;
void qemu_add_machine_init_done_notifier(Notifier *notify);
void qemu_remove_machine_init_done_notifier(Notifier *notify);