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* Record-replay lockstep execution, log dumper and fixes (Alex, Pavel)

Browse source 
* SCSI fix to pass maximum transfer size (Daniel Barboza)
 * chardev fixes and improved iothread support (Daniel Berrangé, Peter)
 * checkpatch tweak (Eric)
 * make help tweak (Marc-André)
 * make more PCI NICs available with -net or -nic (myself)
 * change default q35 NIC to e1000e (myself)
 * SCSI support for NDOB bit (myself)
 * membarrier system call support (myself)
 * SuperIO refactoring (Philippe)
 * miscellaneous cleanups and fixes (Thomas)
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 Version: GnuPG v2.0.22 (GNU/Linux)
 
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Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Record-replay lockstep execution, log dumper and fixes (Alex, Pavel)
* SCSI fix to pass maximum transfer size (Daniel Barboza)
* chardev fixes and improved iothread support (Daniel Berrangé, Peter)
* checkpatch tweak (Eric)
* make help tweak (Marc-André)
* make more PCI NICs available with -net or -nic (myself)
* change default q35 NIC to e1000e (myself)
* SCSI support for NDOB bit (myself)
* membarrier system call support (myself)
* SuperIO refactoring (Philippe)
* miscellaneous cleanups and fixes (Thomas)

# gpg: Signature made Mon 12 Mar 2018 16:10:52 GMT
# gpg:                using RSA key BFFBD25F78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>"
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream: (69 commits)
  tcg: fix cpu_io_recompile
  replay: update documentation
  replay: save vmstate of the asynchronous events
  replay: don't process async events when warping the clock
  scripts/replay-dump.py: replay log dumper
  replay: avoid recursive call of checkpoints
  replay: check return values of fwrite
  replay: push replay_mutex_lock up the call tree
  replay: don't destroy mutex at exit
  replay: make locking visible outside replay code
  replay/replay-internal.c: track holding of replay_lock
  replay/replay.c: bump REPLAY_VERSION again
  replay: save prior value of the host clock
  replay: added replay log format description
  replay: fix save/load vm for non-empty queue
  replay: fixed replay_enable_events
  replay: fix processing async events
  cpu-exec: fix exception_index handling
  hw/i386/pc: Factor out the superio code
  hw/alpha/dp264: Use the TYPE_SMC37C669_SUPERIO
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	default-configs/i386-softmmu.mak
#	default-configs/x86_64-softmmu.mak
This commit is contained in:
Peter Maydell 2018-03-16 11:05:03 +00:00
commit 3788c7b6e5
117 changed files with 1952 additions and 728 deletions
Download patch file Download diff file Expand all files Collapse all files

13
hw/alpha/dp264.c
View file

@ -19,7 +19,8 @@
#include "hw/timer/mc146818rtc.h"
#include "hw/ide.h"
#include "hw/timer/i8254.h"
#include "hw/char/serial.h"
#include "hw/isa/superio.h"
#include "hw/dma/i8257.h"
#include "qemu/cutils.h"
#define MAX_IDE_BUS 2
@ -81,19 +82,21 @@ static void clipper_init(MachineState *machine)
mc146818_rtc_init(isa_bus, 1900, rtc_irq);
i8254_pit_init(isa_bus, 0x40, 0, NULL);
isa_create_simple(isa_bus, "i8042");
/* VGA setup. Don't bother loading the bios. */
pci_vga_init(pci_bus);
/* Serial code setup. */
serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
/* Network setup. e1000 is good enough, failing Tulip support. */
for (i = 0; i < nb_nics; i++) {
pci_nic_init_nofail(&nd_table[i], pci_bus, "e1000", NULL);
}
/* 2 82C37 (dma) */
isa_create_simple(isa_bus, "i82374");
/* Super I/O */
isa_create_simple(isa_bus, TYPE_SMC37C669_SUPERIO);
/* IDE disk setup. */
{
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

1
hw/arm/highbank.c
View file

@ -27,7 +27,6 @@
#include "sysemu/kvm.h"
#include "sysemu/sysemu.h"
#include "hw/boards.h"
#include "sysemu/block-backend.h"
#include "exec/address-spaces.h"
#include "qemu/error-report.h"
#include "hw/char/pl011.h"

1
hw/arm/msf2-soc.c
View file

@ -29,7 +29,6 @@
#include "exec/address-spaces.h"
#include "hw/char/serial.h"
#include "hw/boards.h"
#include "sysemu/block-backend.h"
#include "qemu/cutils.h"
#include "hw/arm/msf2-soc.h"
#include "hw/misc/unimp.h"

1
hw/arm/realview.c
View file

@ -20,7 +20,6 @@
#include "sysemu/sysemu.h"
#include "hw/boards.h"
#include "hw/i2c/i2c.h"
#include "sysemu/block-backend.h"
#include "exec/address-spaces.h"
#include "qemu/error-report.h"
#include "hw/char/pl011.h"

1
hw/arm/tosa.c
View file

@ -22,7 +22,6 @@
#include "hw/boards.h"
#include "hw/i2c/i2c.h"
#include "hw/ssi/ssi.h"
#include "sysemu/block-backend.h"
#include "hw/sysbus.h"
#include "exec/address-spaces.h"
#include "sysemu/sysemu.h"

1
hw/char/Makefile.objs
View file

@ -1,6 +1,7 @@
common-obj-$(CONFIG_IPACK) += ipoctal232.o
common-obj-$(CONFIG_ESCC) += escc.o
common-obj-$(CONFIG_PARALLEL) += parallel.o
common-obj-$(CONFIG_PARALLEL) += parallel-isa.o
common-obj-$(CONFIG_PL011) += pl011.o
common-obj-$(CONFIG_SERIAL) += serial.o
common-obj-$(CONFIG_SERIAL_ISA) += serial-isa.o

36
hw/char/parallel-isa.c Normal file
View file

@ -0,0 +1,36 @@
/*
* QEMU Parallel PORT (ISA bus helpers)
*
* Copyright (c) 2003 Fabrice Bellard
*
* SPDX-License-Identifier: MIT
*/
#include "qemu/osdep.h"
#include "sysemu/sysemu.h"
#include "hw/isa/isa.h"
#include "hw/char/parallel.h"
static void parallel_init(ISABus *bus, int index, Chardev *chr)
{
DeviceState *dev;
ISADevice *isadev;
isadev = isa_create(bus, "isa-parallel");
dev = DEVICE(isadev);
qdev_prop_set_uint32(dev, "index", index);
qdev_prop_set_chr(dev, "chardev", chr);
qdev_init_nofail(dev);
}
void parallel_hds_isa_init(ISABus *bus, int n)
{
int i;
assert(n <= MAX_PARALLEL_PORTS);
for (i = 0; i < n; i++) {
if (parallel_hds[i]) {
parallel_init(bus, i, parallel_hds[i]);
}
}
}

2
hw/char/parallel.c
View file

@ -28,7 +28,7 @@
#include "chardev/char-parallel.h"
#include "chardev/char-fe.h"
#include "hw/isa/isa.h"
#include "hw/i386/pc.h"
#include "hw/char/parallel.h"
#include "sysemu/sysemu.h"
//#define DEBUG_PARALLEL

3
hw/dma/i82374.c
View file

@ -24,6 +24,7 @@
#include "qemu/osdep.h"
#include "hw/isa/isa.h"
#include "hw/dma/i8257.h"
#define TYPE_I82374 "i82374"
#define I82374(obj) OBJECT_CHECK(I82374State, (obj), TYPE_I82374)
@ -123,7 +124,7 @@ static void i82374_realize(DeviceState *dev, Error **errp)
portio_list_add(&s->port_list, isa_address_space_io(&s->parent_obj),
s->iobase);
DMA_init(isa_bus_from_device(ISA_DEVICE(dev)), 1);
i8257_dma_init(isa_bus_from_device(ISA_DEVICE(dev)), true);
memset(s->commands, 0, sizeof(s->commands));
}

4
hw/dma/i8257.c
View file

@ -24,7 +24,7 @@
#include "qemu/osdep.h"
#include "hw/hw.h"
#include "hw/isa/isa.h"
#include "hw/isa/i8257.h"
#include "hw/dma/i8257.h"
#include "qemu/main-loop.h"
#include "trace.h"
@ -622,7 +622,7 @@ static void i8257_register_types(void)
type_init(i8257_register_types)
void DMA_init(ISABus *bus, int high_page_enable)
void i8257_dma_init(ISABus *bus, bool high_page_enable)
{
ISADevice *isa1, *isa2;
DeviceState *d;

4
hw/i386/Makefile.objs
View file

@ -2,8 +2,8 @@ obj-$(CONFIG_KVM) += kvm/
obj-y += multiboot.o
obj-y += pc.o pc_piix.o pc_q35.o
obj-y += pc_sysfw.o
obj-y += x86-iommu.o intel_iommu.o
obj-y += amd_iommu.o
obj-$(CONFIG_VTD) += x86-iommu.o intel_iommu.o
obj-$(CONFIG_AMD_IOMMU) += x86-iommu.o amd_iommu.o
obj-$(CONFIG_XEN) += ../xenpv/ xen/
obj-$(CONFIG_VMPORT) += vmport.o
obj-$(CONFIG_VMMOUSE) += vmmouse.o

86
hw/i386/pc.c
View file

@ -26,6 +26,7 @@
#include "hw/hw.h"
#include "hw/i386/pc.h"
#include "hw/char/serial.h"
#include "hw/char/parallel.h"
#include "hw/i386/apic.h"
#include "hw/i386/topology.h"
#include "sysemu/cpus.h"
@ -40,7 +41,9 @@
#include "elf.h"
#include "multiboot.h"
#include "hw/timer/mc146818rtc.h"
#include "hw/dma/i8257.h"
#include "hw/timer/i8254.h"
#include "hw/input/i8042.h"
#include "hw/audio/pcspk.h"
#include "hw/pci/msi.h"
#include "hw/sysbus.h"
@ -50,8 +53,6 @@
#include "sysemu/qtest.h"
#include "kvm_i386.h"
#include "hw/xen/xen.h"
#include "sysemu/block-backend.h"
#include "hw/block/block.h"
#include "ui/qemu-spice.h"
#include "exec/memory.h"
#include "exec/address-spaces.h"
@ -1516,6 +1517,44 @@ static const MemoryRegionOps ioportF0_io_ops = {
},
};
static void pc_superio_init(ISABus *isa_bus, bool create_fdctrl, bool no_vmport)
{
int i;
DriveInfo *fd[MAX_FD];
qemu_irq *a20_line;
ISADevice *i8042, *port92, *vmmouse;
serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
parallel_hds_isa_init(isa_bus, MAX_PARALLEL_PORTS);
for (i = 0; i < MAX_FD; i++) {
fd[i] = drive_get(IF_FLOPPY, 0, i);
create_fdctrl |= !!fd[i];
}
if (create_fdctrl) {
fdctrl_init_isa(isa_bus, fd);
}
i8042 = isa_create_simple(isa_bus, "i8042");
if (!no_vmport) {
vmport_init(isa_bus);
vmmouse = isa_try_create(isa_bus, "vmmouse");
} else {
vmmouse = NULL;
}
if (vmmouse) {
DeviceState *dev = DEVICE(vmmouse);
qdev_prop_set_ptr(dev, "ps2_mouse", i8042);
qdev_init_nofail(dev);
}
port92 = isa_create_simple(isa_bus, "port92");
a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2);
i8042_setup_a20_line(i8042, a20_line[0]);
port92_init(port92, a20_line[1]);
g_free(a20_line);
}
void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
ISADevice **rtc_state,
bool create_fdctrl,
@ -1524,13 +1563,11 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
uint32_t hpet_irqs)
{
int i;
DriveInfo *fd[MAX_FD];
DeviceState *hpet = NULL;
int pit_isa_irq = 0;
qemu_irq pit_alt_irq = NULL;
qemu_irq rtc_irq = NULL;
qemu_irq *a20_line;
ISADevice *i8042, *port92, *vmmouse, *pit = NULL;
ISADevice *pit = NULL;
MemoryRegion *ioport80_io = g_new(MemoryRegion, 1);
MemoryRegion *ioportF0_io = g_new(MemoryRegion, 1);
@ -1587,50 +1624,25 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
pcspk_init(isa_bus, pit);
}
serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
parallel_hds_isa_init(isa_bus, MAX_PARALLEL_PORTS);
i8257_dma_init(isa_bus, 0);
a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2);
i8042 = isa_create_simple(isa_bus, "i8042");
i8042_setup_a20_line(i8042, a20_line[0]);
if (!no_vmport) {
vmport_init(isa_bus);
vmmouse = isa_try_create(isa_bus, "vmmouse");
} else {
vmmouse = NULL;
}
if (vmmouse) {
DeviceState *dev = DEVICE(vmmouse);
qdev_prop_set_ptr(dev, "ps2_mouse", i8042);
qdev_init_nofail(dev);
}
port92 = isa_create_simple(isa_bus, "port92");
port92_init(port92, a20_line[1]);
g_free(a20_line);
DMA_init(isa_bus, 0);
for(i = 0; i < MAX_FD; i++) {
fd[i] = drive_get(IF_FLOPPY, 0, i);
create_fdctrl |= !!fd[i];
}
if (create_fdctrl) {
fdctrl_init_isa(isa_bus, fd);
}
/* Super I/O */
pc_superio_init(isa_bus, create_fdctrl, no_vmport);
}
void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus)
void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus)
{
int i;
rom_set_order_override(FW_CFG_ORDER_OVERRIDE_NIC);
for (i = 0; i < nb_nics; i++) {
NICInfo *nd = &nd_table[i];
const char *model = nd->model ? nd->model : pcmc->default_nic_model;
if (!pci_bus || (nd->model && strcmp(nd->model, "ne2k_isa") == 0)) {
if (g_str_equal(model, "ne2k_isa")) {
pc_init_ne2k_isa(isa_bus, nd);
} else {
pci_nic_init_nofail(nd, pci_bus, "e1000", NULL);
pci_nic_init_nofail(nd, pci_bus, model, NULL);
}
}
rom_reset_order_override();

7
hw/i386/pc_piix.c
View file

@ -40,7 +40,6 @@
#include "sysemu/sysemu.h"
#include "hw/sysbus.h"
#include "sysemu/arch_init.h"
#include "sysemu/block-backend.h"
#include "hw/i2c/smbus.h"
#include "hw/xen/xen.h"
#include "exec/memory.h"
@ -240,7 +239,7 @@ static void pc_init1(MachineState *machine,
pc_basic_device_init(isa_bus, pcms->gsi, &rtc_state, true,
(pcms->vmport != ON_OFF_AUTO_ON), pcms->pit, 0x4);
pc_nic_init(isa_bus, pci_bus);
pc_nic_init(pcmc, isa_bus, pci_bus);
ide_drive_get(hd, ARRAY_SIZE(hd));
if (pcmc->pci_enabled) {
@ -417,6 +416,9 @@ static void pc_xen_hvm_init(MachineState *machine)
static void pc_i440fx_machine_options(MachineClass *m)
{
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pcmc->default_nic_model = "e1000";
m->family = "pc_piix";
m->desc = "Standard PC (i440FX + PIIX, 1996)";
m->default_machine_opts = "firmware=bios-256k.bin";
@ -1114,6 +1116,7 @@ static void isapc_machine_options(MachineClass *m)
pcmc->gigabyte_align = false;
pcmc->smbios_legacy_mode = true;
pcmc->has_reserved_memory = false;
pcmc->default_nic_model = "ne2k_isa";
m->default_cpu_type = X86_CPU_TYPE_NAME("486");
}

8
hw/i386/pc_q35.c
View file

@ -272,7 +272,7 @@ static void pc_q35_init(MachineState *machine)
/* the rest devices to which pci devfn is automatically assigned */
pc_vga_init(isa_bus, host_bus);
pc_nic_init(isa_bus, host_bus);
pc_nic_init(pcmc, isa_bus, host_bus);
if (pcms->acpi_nvdimm_state.is_enabled) {
nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io,
@ -294,6 +294,9 @@ static void pc_q35_init(MachineState *machine)
static void pc_q35_machine_options(MachineClass *m)
{
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pcmc->default_nic_model = "e1000e";
m->family = "pc_q35";
m->desc = "Standard PC (Q35 + ICH9, 2009)";
m->units_per_default_bus = 1;
@ -316,7 +319,10 @@ DEFINE_Q35_MACHINE(v2_12, "pc-q35-2.12", NULL,
static void pc_q35_2_11_machine_options(MachineClass *m)
{
PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
pc_q35_2_12_machine_options(m);
pcmc->default_nic_model = "e1000";
m->alias = NULL;
SET_MACHINE_COMPAT(m, PC_COMPAT_2_11);
}

1
hw/i386/vmmouse.c
View file

@ -25,6 +25,7 @@
#include "hw/hw.h"
#include "ui/console.h"
#include "hw/i386/pc.h"
#include "hw/input/i8042.h"
#include "hw/qdev.h"
/* debug only vmmouse */

1
hw/i386/vmport.c
View file

@ -25,6 +25,7 @@
#include "hw/hw.h"
#include "hw/isa/isa.h"
#include "hw/i386/pc.h"
#include "hw/input/i8042.h"
#include "sysemu/hw_accel.h"
#include "hw/qdev.h"
#include "qemu/log.h"

1
hw/ide/ahci-allwinner.c
View file

@ -18,7 +18,6 @@
#include "qemu/osdep.h"
#include "hw/hw.h"
#include "qemu/error-report.h"
#include "sysemu/block-backend.h"
#include "sysemu/dma.h"
#include "hw/ide/internal.h"
#include "hw/ide/ahci_internal.h"

1
hw/ide/cmd646.c
View file

@ -26,7 +26,6 @@
#include "hw/hw.h"
#include "hw/pci/pci.h"
#include "hw/isa/isa.h"
#include "sysemu/block-backend.h"
#include "sysemu/sysemu.h"
#include "sysemu/dma.h"

1
hw/ide/ich.c
View file

@ -65,7 +65,6 @@
#include "hw/pci/msi.h"
#include "hw/pci/pci.h"
#include "hw/isa/isa.h"
#include "sysemu/block-backend.h"
#include "sysemu/dma.h"
#include "hw/ide/pci.h"
#include "hw/ide/ahci_internal.h"

1
hw/ide/isa.c
View file

@ -25,7 +25,6 @@
#include "qemu/osdep.h"
#include "hw/hw.h"
#include "hw/isa/isa.h"
#include "sysemu/block-backend.h"
#include "sysemu/dma.h"
#include "hw/ide/internal.h"

1
hw/ide/microdrive.c
View file

@ -25,7 +25,6 @@
#include "qemu/osdep.h"
#include "hw/hw.h"
#include "hw/pcmcia.h"
#include "sysemu/block-backend.h"
#include "sysemu/dma.h"
#include "hw/ide/internal.h"

1
hw/ide/mmio.c
View file

@ -25,7 +25,6 @@
#include "qemu/osdep.h"
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "sysemu/block-backend.h"
#include "sysemu/dma.h"
#include "hw/ide/internal.h"

2
hw/input/pckbd.c
View file

@ -26,6 +26,7 @@
#include "hw/isa/isa.h"
#include "hw/i386/pc.h"
#include "hw/input/ps2.h"
#include "hw/input/i8042.h"
#include "sysemu/sysemu.h"
/* debug PC keyboard */
@ -480,7 +481,6 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
qemu_register_reset(kbd_reset, s);
}
#define TYPE_I8042 "i8042"
#define I8042(obj) OBJECT_CHECK(ISAKBDState, (obj), TYPE_I8042)
typedef struct ISAKBDState {

1
hw/isa/Makefile.objs
View file

@ -1,4 +1,5 @@
common-obj-$(CONFIG_ISA_BUS) += isa-bus.o
common-obj-$(CONFIG_ISA_BUS) += isa-superio.o smc37c669-superio.o
common-obj-$(CONFIG_APM) += apm.o
common-obj-$(CONFIG_I82378) += i82378.o
common-obj-$(CONFIG_PC87312) += pc87312.o

26
hw/isa/isa-bus.c
View file

@ -24,7 +24,6 @@
#include "hw/sysbus.h"
#include "sysemu/sysemu.h"
#include "hw/isa/isa.h"
#include "hw/i386/pc.h"
static ISABus *isabus;
@ -288,28 +287,3 @@ MemoryRegion *isa_address_space_io(ISADevice *dev)
}
type_init(isabus_register_types)
static void parallel_init(ISABus *bus, int index, Chardev *chr)
{
DeviceState *dev;
ISADevice *isadev;
isadev = isa_create(bus, "isa-parallel");
dev = DEVICE(isadev);
qdev_prop_set_uint32(dev, "index", index);
qdev_prop_set_chr(dev, "chardev", chr);
qdev_init_nofail(dev);
}
void parallel_hds_isa_init(ISABus *bus, int n)
{
int i;
assert(n <= MAX_PARALLEL_PORTS);
for (i = 0; i < n; i++) {
if (parallel_hds[i]) {
parallel_init(bus, i, parallel_hds[i]);
}
}
}

214
hw/isa/isa-superio.c Normal file
View file

@ -0,0 +1,214 @@
/*
* Generic ISA Super I/O
*
* Copyright (c) 2010-2012 Herve Poussineau
* Copyright (c) 2011-2012 Andreas Färber
* Copyright (c) 2018 Philippe Mathieu-Daudé
*
* This code is licensed under the GNU GPLv2 and later.
* See the COPYING file in the top-level directory.
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#include "qemu/osdep.h"
#include "qemu/error-report.h"
#include "qapi/error.h"
#include "sysemu/sysemu.h"
#include "sysemu/block-backend.h"
#include "sysemu/blockdev.h"
#include "chardev/char.h"
#include "hw/isa/superio.h"
#include "hw/input/i8042.h"
#include "hw/char/serial.h"
#include "trace.h"
static void isa_superio_realize(DeviceState *dev, Error **errp)
{
ISASuperIODevice *sio = ISA_SUPERIO(dev);
ISASuperIOClass *k = ISA_SUPERIO_GET_CLASS(sio);
ISABus *bus = isa_bus_from_device(ISA_DEVICE(dev));
ISADevice *isa;
DeviceState *d;
Chardev *chr;
DriveInfo *drive;
char *name;
int i;
/* Parallel port */
for (i = 0; i < k->parallel.count; i++) {
if (i >= ARRAY_SIZE(sio->parallel)) {
warn_report("superio: ignoring %td parallel controllers",
k->parallel.count - ARRAY_SIZE(sio->parallel));
break;
}
if (!k->parallel.is_enabled || k->parallel.is_enabled(sio, i)) {
/* FIXME use a qdev chardev prop instead of parallel_hds[] */
chr = parallel_hds[i];
if (chr == NULL || chr->be) {
name = g_strdup_printf("discarding-parallel%d", i);
chr = qemu_chr_new(name, "null");
} else {
name = g_strdup_printf("parallel%d", i);
}
isa = isa_create(bus, "isa-parallel");
d = DEVICE(isa);
qdev_prop_set_uint32(d, "index", i);
if (k->parallel.get_iobase) {
qdev_prop_set_uint32(d, "iobase",
k->parallel.get_iobase(sio, i));
}
if (k->parallel.get_irq) {
qdev_prop_set_uint32(d, "irq", k->parallel.get_irq(sio, i));
}
qdev_prop_set_chr(d, "chardev", chr);
qdev_init_nofail(d);
sio->parallel[i] = isa;
trace_superio_create_parallel(i,
k->parallel.get_iobase ?
k->parallel.get_iobase(sio, i) : -1,
k->parallel.get_irq ?
k->parallel.get_irq(sio, i) : -1);
object_property_add_child(OBJECT(dev), name,
OBJECT(sio->parallel[i]), NULL);
g_free(name);
}
}
/* Serial */
for (i = 0; i < k->serial.count; i++) {
if (i >= ARRAY_SIZE(sio->serial)) {
warn_report("superio: ignoring %td serial controllers",
k->serial.count - ARRAY_SIZE(sio->serial));
break;
}
if (!k->serial.is_enabled || k->serial.is_enabled(sio, i)) {
/* FIXME use a qdev chardev prop instead of serial_hds[] */
chr = serial_hds[i];
if (chr == NULL || chr->be) {
name = g_strdup_printf("discarding-serial%d", i);
chr = qemu_chr_new(name, "null");
} else {
name = g_strdup_printf("serial%d", i);
}
isa = isa_create(bus, TYPE_ISA_SERIAL);
d = DEVICE(isa);
qdev_prop_set_uint32(d, "index", i);
if (k->serial.get_iobase) {
qdev_prop_set_uint32(d, "iobase",
k->serial.get_iobase(sio, i));
}
if (k->serial.get_irq) {
qdev_prop_set_uint32(d, "irq", k->serial.get_irq(sio, i));
}
qdev_prop_set_chr(d, "chardev", chr);
qdev_init_nofail(d);
sio->serial[i] = isa;
trace_superio_create_serial(i,
k->serial.get_iobase ?
k->serial.get_iobase(sio, i) : -1,
k->serial.get_irq ?
k->serial.get_irq(sio, i) : -1);
object_property_add_child(OBJECT(dev), name,
OBJECT(sio->serial[0]), NULL);
g_free(name);
}
}
/* Floppy disc */
if (!k->floppy.is_enabled || k->floppy.is_enabled(sio, 0)) {
isa = isa_create(bus, "isa-fdc");
d = DEVICE(isa);
if (k->floppy.get_iobase) {
qdev_prop_set_uint32(d, "iobase", k->floppy.get_iobase(sio, 0));
}
if (k->floppy.get_irq) {
qdev_prop_set_uint32(d, "irq", k->floppy.get_irq(sio, 0));
}
/* FIXME use a qdev drive property instead of drive_get() */
drive = drive_get(IF_FLOPPY, 0, 0);
if (drive != NULL) {
qdev_prop_set_drive(d, "driveA", blk_by_legacy_dinfo(drive),
&error_fatal);
}
/* FIXME use a qdev drive property instead of drive_get() */
drive = drive_get(IF_FLOPPY, 0, 1);
if (drive != NULL) {
qdev_prop_set_drive(d, "driveB", blk_by_legacy_dinfo(drive),
&error_fatal);
}
qdev_init_nofail(d);
sio->floppy = isa;
trace_superio_create_floppy(0,
k->floppy.get_iobase ?
k->floppy.get_iobase(sio, 0) : -1,
k->floppy.get_irq ?
k->floppy.get_irq(sio, 0) : -1);
}
/* Keyboard, mouse */
sio->kbc = isa_create_simple(bus, TYPE_I8042);
/* IDE */
if (k->ide.count && (!k->ide.is_enabled || k->ide.is_enabled(sio, 0))) {
isa = isa_create(bus, "isa-ide");
d = DEVICE(isa);
if (k->ide.get_iobase) {
qdev_prop_set_uint32(d, "iobase", k->ide.get_iobase(sio, 0));
}
if (k->ide.get_iobase) {
qdev_prop_set_uint32(d, "iobase2", k->ide.get_iobase(sio, 1));
}
if (k->ide.get_irq) {
qdev_prop_set_uint32(d, "irq", k->ide.get_irq(sio, 0));
}
qdev_init_nofail(d);
sio->ide = isa;
trace_superio_create_ide(0,
k->ide.get_iobase ?
k->ide.get_iobase(sio, 0) : -1,
k->ide.get_irq ?
k->ide.get_irq(sio, 0) : -1);
}
}
static void isa_superio_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
dc->realize = isa_superio_realize;
/* Reason: Uses parallel_hds[0] in realize(), so it can't be used twice */
dc->user_creatable = false;
}
static const TypeInfo isa_superio_type_info = {
.name = TYPE_ISA_SUPERIO,
.parent = TYPE_ISA_DEVICE,
.abstract = true,
.class_size = sizeof(ISASuperIOClass),
.class_init = isa_superio_class_init,
};
/* SMS FDC37M817 Super I/O */
static void fdc37m81x_class_init(ObjectClass *klass, void *data)
{
ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
sc->serial.count = 2; /* NS16C550A */
sc->parallel.count = 1;
sc->floppy.count = 1; /* SMSC 82077AA Compatible */
sc->ide.count = 0;
}
static const TypeInfo fdc37m81x_type_info = {
.name = TYPE_FDC37M81X_SUPERIO,
.parent = TYPE_ISA_SUPERIO,
.instance_size = sizeof(ISASuperIODevice),
.class_init = fdc37m81x_class_init,
};
static void isa_superio_register_types(void)
{
type_register_static(&isa_superio_type_info);
type_register_static(&fdc37m81x_type_info);
}
type_init(isa_superio_register_types)

178
hw/isa/pc87312.c
View file

@ -27,10 +27,6 @@
#include "hw/isa/pc87312.h"
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "sysemu/block-backend.h"
#include "sysemu/blockdev.h"
#include "sysemu/sysemu.h"
#include "chardev/char.h"
#include "trace.h"
@ -64,22 +60,25 @@
/* Parallel port */
static inline bool is_parallel_enabled(PC87312State *s)
static bool is_parallel_enabled(ISASuperIODevice *sio, uint8_t index)
{
return s->regs[REG_FER] & FER_PARALLEL_EN;
PC87312State *s = PC87312(sio);
return index ? false : s->regs[REG_FER] & FER_PARALLEL_EN;
}
static const uint32_t parallel_base[] = { 0x378, 0x3bc, 0x278, 0x00 };
static const uint16_t parallel_base[] = { 0x378, 0x3bc, 0x278, 0x00 };
static inline uint32_t get_parallel_iobase(PC87312State *s)
static uint16_t get_parallel_iobase(ISASuperIODevice *sio, uint8_t index)
{
PC87312State *s = PC87312(sio);
return parallel_base[s->regs[REG_FAR] & FAR_PARALLEL_ADDR];
}
static const uint32_t parallel_irq[] = { 5, 7, 5, 0 };
static const unsigned int parallel_irq[] = { 5, 7, 5, 0 };
static inline uint32_t get_parallel_irq(PC87312State *s)
static unsigned int get_parallel_irq(ISASuperIODevice *sio, uint8_t index)
{
PC87312State *s = PC87312(sio);
int idx;
idx = (s->regs[REG_FAR] & FAR_PARALLEL_ADDR);
if (idx == 0) {
@ -92,13 +91,14 @@ static inline uint32_t get_parallel_irq(PC87312State *s)
/* UARTs */
static const uint32_t uart_base[2][4] = {
static const uint16_t uart_base[2][4] = {
{ 0x3e8, 0x338, 0x2e8, 0x220 },
{ 0x2e8, 0x238, 0x2e0, 0x228 }
};
static inline uint32_t get_uart_iobase(PC87312State *s, int i)
static uint16_t get_uart_iobase(ISASuperIODevice *sio, uint8_t i)
{
PC87312State *s = PC87312(sio);
int idx;
idx = (s->regs[REG_FAR] >> (2 * i + 2)) & 0x3;
if (idx == 0) {
@ -110,44 +110,68 @@ static inline uint32_t get_uart_iobase(PC87312State *s, int i)
}
}
static inline uint32_t get_uart_irq(PC87312State *s, int i)
static unsigned int get_uart_irq(ISASuperIODevice *sio, uint8_t i)
{
PC87312State *s = PC87312(sio);
int idx;
idx = (s->regs[REG_FAR] >> (2 * i + 2)) & 0x3;
return (idx & 1) ? 3 : 4;
}
static inline bool is_uart_enabled(PC87312State *s, int i)
static bool is_uart_enabled(ISASuperIODevice *sio, uint8_t i)
{
PC87312State *s = PC87312(sio);
return s->regs[REG_FER] & (FER_UART1_EN << i);
}
/* Floppy controller */
static inline bool is_fdc_enabled(PC87312State *s)
static bool is_fdc_enabled(ISASuperIODevice *sio, uint8_t index)
{
PC87312State *s = PC87312(sio);
assert(!index);
return s->regs[REG_FER] & FER_FDC_EN;
}
static inline uint32_t get_fdc_iobase(PC87312State *s)
static uint16_t get_fdc_iobase(ISASuperIODevice *sio, uint8_t index)
{
PC87312State *s = PC87312(sio);
assert(!index);
return (s->regs[REG_FER] & FER_FDC_ADDR) ? 0x370 : 0x3f0;
}
static unsigned int get_fdc_irq(ISASuperIODevice *sio, uint8_t index)
{
assert(!index);
return 6;
}
/* IDE controller */
static inline bool is_ide_enabled(PC87312State *s)
static bool is_ide_enabled(ISASuperIODevice *sio, uint8_t index)
{
PC87312State *s = PC87312(sio);
return s->regs[REG_FER] & FER_IDE_EN;
}
static inline uint32_t get_ide_iobase(PC87312State *s)
static uint16_t get_ide_iobase(ISASuperIODevice *sio, uint8_t index)
{
PC87312State *s = PC87312(sio);
if (index == 1) {
return get_ide_iobase(sio, 0) + 0x206;
}
return (s->regs[REG_FER] & FER_IDE_ADDR) ? 0x170 : 0x1f0;
}
static unsigned int get_ide_irq(ISASuperIODevice *sio, uint8_t index)
{
assert(index == 0);
return 14;
}
static void reconfigure_devices(PC87312State *s)
{
@ -265,90 +289,18 @@ static void pc87312_reset(DeviceState *d)
static void pc87312_realize(DeviceState *dev, Error **errp)
{
PC87312State *s;
DeviceState *d;
ISADevice *isa;
ISABus *bus;
Chardev *chr;
DriveInfo *drive;
char name[5];
int i;
Error *local_err = NULL;
s = PC87312(dev);
isa = ISA_DEVICE(dev);
bus = isa_bus_from_device(isa);
isa_register_ioport(isa, &s->io, s->iobase);
pc87312_hard_reset(s);
if (is_parallel_enabled(s)) {
/* FIXME use a qdev chardev prop instead of parallel_hds[] */
chr = parallel_hds[0];
if (chr == NULL) {
chr = qemu_chr_new("par0", "null");
}
isa = isa_create(bus, "isa-parallel");
d = DEVICE(isa);
qdev_prop_set_uint32(d, "index", 0);
qdev_prop_set_uint32(d, "iobase", get_parallel_iobase(s));
qdev_prop_set_uint32(d, "irq", get_parallel_irq(s));
qdev_prop_set_chr(d, "chardev", chr);
qdev_init_nofail(d);
s->parallel.dev = isa;
trace_pc87312_info_parallel(get_parallel_iobase(s),
get_parallel_irq(s));
}
for (i = 0; i < 2; i++) {
if (is_uart_enabled(s, i)) {
/* FIXME use a qdev chardev prop instead of serial_hds[] */
chr = serial_hds[i];
if (chr == NULL) {
snprintf(name, sizeof(name), "ser%d", i);
chr = qemu_chr_new(name, "null");
}
isa = isa_create(bus, "isa-serial");
d = DEVICE(isa);
qdev_prop_set_uint32(d, "index", i);
qdev_prop_set_uint32(d, "iobase", get_uart_iobase(s, i));
qdev_prop_set_uint32(d, "irq", get_uart_irq(s, i));
qdev_prop_set_chr(d, "chardev", chr);
qdev_init_nofail(d);
s->uart[i].dev = isa;
trace_pc87312_info_serial(i, get_uart_iobase(s, i),
get_uart_irq(s, i));
}
}
if (is_fdc_enabled(s)) {
isa = isa_create(bus, "isa-fdc");
d = DEVICE(isa);
qdev_prop_set_uint32(d, "iobase", get_fdc_iobase(s));
qdev_prop_set_uint32(d, "irq", 6);
/* FIXME use a qdev drive property instead of drive_get() */
drive = drive_get(IF_FLOPPY, 0, 0);
if (drive != NULL) {
qdev_prop_set_drive(d, "driveA", blk_by_legacy_dinfo(drive),
&error_fatal);
}
/* FIXME use a qdev drive property instead of drive_get() */
drive = drive_get(IF_FLOPPY, 0, 1);
if (drive != NULL) {
qdev_prop_set_drive(d, "driveB", blk_by_legacy_dinfo(drive),
&error_fatal);
}
qdev_init_nofail(d);
s->fdc.dev = isa;
trace_pc87312_info_floppy(get_fdc_iobase(s));
}
if (is_ide_enabled(s)) {
isa = isa_create(bus, "isa-ide");
d = DEVICE(isa);
qdev_prop_set_uint32(d, "iobase", get_ide_iobase(s));
qdev_prop_set_uint32(d, "iobase2", get_ide_iobase(s) + 0x206);
qdev_prop_set_uint32(d, "irq", 14);
qdev_init_nofail(d);
s->ide.dev = isa;
trace_pc87312_info_ide(get_ide_iobase(s));
ISA_SUPERIO_GET_CLASS(dev)->parent_realize(dev, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
}
}
@ -373,7 +325,7 @@ static const VMStateDescription vmstate_pc87312 = {
};
static Property pc87312_properties[] = {
DEFINE_PROP_UINT32("iobase", PC87312State, iobase, 0x398),
DEFINE_PROP_UINT16("iobase", PC87312State, iobase, 0x398),
DEFINE_PROP_UINT8("config", PC87312State, config, 1),
DEFINE_PROP_END_OF_LIST()
};
@ -381,21 +333,47 @@ static Property pc87312_properties[] = {
static void pc87312_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
sc->parent_realize = dc->realize;
dc->realize = pc87312_realize;
dc->reset = pc87312_reset;
dc->vmsd = &vmstate_pc87312;
dc->props = pc87312_properties;
/* Reason: Uses parallel_hds[0] in realize(), so it can't be used twice */
dc->user_creatable = false;
sc->parallel = (ISASuperIOFuncs){
.count = 1,
.is_enabled = is_parallel_enabled,
.get_iobase = get_parallel_iobase,
.get_irq = get_parallel_irq,
};
sc->serial = (ISASuperIOFuncs){
.count = 2,
.is_enabled = is_uart_enabled,
.get_iobase = get_uart_iobase,
.get_irq = get_uart_irq,
};
sc->floppy = (ISASuperIOFuncs){
.count = 1,
.is_enabled = is_fdc_enabled,
.get_iobase = get_fdc_iobase,
.get_irq = get_fdc_irq,
};
sc->ide = (ISASuperIOFuncs){
.count = 1,
.is_enabled = is_ide_enabled,
.get_iobase = get_ide_iobase,
.get_irq = get_ide_irq,
};
}
static const TypeInfo pc87312_type_info = {
.name = TYPE_PC87312,
.parent = TYPE_ISA_DEVICE,
.name = TYPE_PC87312_SUPERIO,
.parent = TYPE_ISA_SUPERIO,
.instance_size = sizeof(PC87312State),
.instance_init = pc87312_initfn,
.class_init = pc87312_class_init,
/* FIXME use a qdev drive property instead of drive_get() */
};
static void pc87312_register_types(void)

115
hw/isa/smc37c669-superio.c Normal file
View file

@ -0,0 +1,115 @@
/*
* SMC FDC37C669 Super I/O controller
*
* Copyright (c) 2018 Philippe Mathieu-Daudé
*
* This code is licensed under the GNU GPLv2 and later.
* See the COPYING file in the top-level directory.
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#include "qemu/osdep.h"
#include "hw/isa/superio.h"
/* UARTs (compatible with NS16450 or PC16550) */
static bool is_serial_enabled(ISASuperIODevice *sio, uint8_t index)
{
return index < 2;
}
static uint16_t get_serial_iobase(ISASuperIODevice *sio, uint8_t index)
{
return index ? 0x2f8 : 0x3f8;
}
static unsigned int get_serial_irq(ISASuperIODevice *sio, uint8_t index)
{
return index ? 3 : 4;
}
/* Parallel port */
static bool is_parallel_enabled(ISASuperIODevice *sio, uint8_t index)
{
return index < 1;
}
static uint16_t get_parallel_iobase(ISASuperIODevice *sio, uint8_t index)
{
return 0x3bc;
}
static unsigned int get_parallel_irq(ISASuperIODevice *sio, uint8_t index)
{
return 7;
}
static unsigned int get_parallel_dma(ISASuperIODevice *sio, uint8_t index)
{
return 3;
}
/* Diskette controller (Software compatible with the Intel PC8477) */
static bool is_fdc_enabled(ISASuperIODevice *sio, uint8_t index)
{
return index < 1;
}
static uint16_t get_fdc_iobase(ISASuperIODevice *sio, uint8_t index)
{
return 0x3f0;
}
static unsigned int get_fdc_irq(ISASuperIODevice *sio, uint8_t index)
{
return 6;
}
static unsigned int get_fdc_dma(ISASuperIODevice *sio, uint8_t index)
{
return 2;
}
static void smc37c669_class_init(ObjectClass *klass, void *data)
{
ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
sc->parallel = (ISASuperIOFuncs){
.count = 1,
.is_enabled = is_parallel_enabled,
.get_iobase = get_parallel_iobase,
.get_irq = get_parallel_irq,
.get_dma = get_parallel_dma,
};
sc->serial = (ISASuperIOFuncs){
.count = 2,
.is_enabled = is_serial_enabled,
.get_iobase = get_serial_iobase,
.get_irq = get_serial_irq,
};
sc->floppy = (ISASuperIOFuncs){
.count = 1,
.is_enabled = is_fdc_enabled,
.get_iobase = get_fdc_iobase,
.get_irq = get_fdc_irq,
.get_dma = get_fdc_dma,
};
sc->ide.count = 0;
}
static const TypeInfo smc37c669_type_info = {
.name = TYPE_SMC37C669_SUPERIO,
.parent = TYPE_ISA_SUPERIO,
.instance_size = sizeof(ISASuperIODevice),
.class_size = sizeof(ISASuperIOClass),
.class_init = smc37c669_class_init,
};
static void smc37c669_register_types(void)
{
type_register_static(&smc37c669_type_info);
}
type_init(smc37c669_register_types)

10
hw/isa/trace-events
View file

@ -1,9 +1,11 @@
# See docs/devel/tracing.txt for syntax documentation.
# hw/isa/isa-superio.c
superio_create_parallel(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u"
superio_create_serial(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u"
superio_create_floppy(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u"
superio_create_ide(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u"
# hw/isa/pc87312.c
pc87312_io_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x"
pc87312_io_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x"
pc87312_info_floppy(uint32_t base) "base 0x%x"
pc87312_info_ide(uint32_t base) "base 0x%x"
pc87312_info_parallel(uint32_t base, uint32_t irq) "base 0x%x, irq %u"
pc87312_info_serial(int n, uint32_t base, uint32_t irq) "id=%d, base 0x%x, irq %u"

22
hw/isa/vt82c686.c
View file

@ -17,6 +17,7 @@
#include "hw/i2c/smbus.h"
#include "hw/pci/pci.h"
#include "hw/isa/isa.h"
#include "hw/isa/superio.h"
#include "hw/sysbus.h"
#include "hw/mips/mips.h"
#include "hw/isa/apm.h"
@ -478,7 +479,7 @@ static void vt82c686b_realize(PCIDevice *d, Error **errp)
qemu_register_reset(vt82c686b_reset, d);
}
ISABus *vt82c686b_init(PCIBus *bus, int devfn)
ISABus *vt82c686b_isa_init(PCIBus *bus, int devfn)
{
PCIDevice *d;
@ -519,11 +520,30 @@ static const TypeInfo via_info = {
},
};
static void vt82c686b_superio_class_init(ObjectClass *klass, void *data)
{
ISASuperIOClass *sc = ISA_SUPERIO_CLASS(klass);
sc->serial.count = 2;
sc->parallel.count = 1;
sc->ide.count = 0;
sc->floppy.count = 1;
}
static const TypeInfo via_superio_info = {
.name = TYPE_VT82C686B_SUPERIO,
.parent = TYPE_ISA_SUPERIO,
.instance_size = sizeof(ISASuperIODevice),
.class_size = sizeof(ISASuperIOClass),
.class_init = vt82c686b_superio_class_init,
};
static void vt82c686b_register_types(void)
{
type_register_static(&via_ac97_info);
type_register_static(&via_mc97_info);
type_register_static(&via_pm_info);
type_register_static(&via_superio_info);
type_register_static(&via_info);
}

86
hw/mips/mips_fulong2e.c
View file

@ -22,17 +22,15 @@
#include "qapi/error.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
#include "hw/char/serial.h"
#include "hw/block/fdc.h"
#include "hw/dma/i8257.h"
#include "hw/isa/superio.h"
#include "net/net.h"
#include "hw/boards.h"
#include "hw/i2c/smbus.h"
#include "sysemu/block-backend.h"
#include "hw/block/flash.h"
#include "hw/mips/mips.h"
#include "hw/mips/cpudevs.h"
#include "hw/pci/pci.h"
#include "sysemu/sysemu.h"
#include "audio/audio.h"
#include "qemu/log.h"
#include "hw/loader.h"
@ -42,7 +40,6 @@
#include "hw/isa/vt82c686.h"
#include "hw/timer/mc146818rtc.h"
#include "hw/timer/i8254.h"
#include "sysemu/blockdev.h"
#include "exec/address-spaces.h"
#include "sysemu/qtest.h"
#include "qemu/error-report.h"
@ -75,8 +72,6 @@
#define FULONG2E_ATI_SLOT 6
#define FULONG2E_RTL8139_SLOT 7
static ISADevice *pit;
static struct _loaderparams {
int ram_size;
const char *kernel_filename;
@ -229,11 +224,40 @@ static const uint8_t eeprom_spd[0x80] = {
0x20,0x30,0x20
};
/* Audio support */
static void audio_init (PCIBus *pci_bus)
static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc,
I2CBus **i2c_bus, ISABus **p_isa_bus)
{
vt82c686b_ac97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 5));
vt82c686b_mc97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 6));
qemu_irq *i8259;
ISABus *isa_bus;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
isa_bus = vt82c686b_isa_init(pci_bus, PCI_DEVFN(slot, 0));
if (!isa_bus) {
fprintf(stderr, "vt82c686b_init error\n");
exit(1);
}
*p_isa_bus = isa_bus;
/* Interrupt controller */
/* The 8259 -> IP5 */
i8259 = i8259_init(isa_bus, intc);
isa_bus_irqs(isa_bus, i8259);
/* init other devices */
i8254_pit_init(isa_bus, 0x40, 0, NULL);
i8257_dma_init(isa_bus, 0);
/* Super I/O */
isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO);
ide_drive_get(hd, ARRAY_SIZE(hd));
vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(slot, 1));
pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci");
pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci");
*i2c_bus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(slot, 4), 0xeee1, NULL);
/* Audio support */
vt82c686b_ac97_init(pci_bus, PCI_DEVFN(slot, 5));
vt82c686b_mc97_init(pci_bus, PCI_DEVFN(slot, 6));
}
/* Network support */
@ -266,11 +290,9 @@ static void mips_fulong2e_init(MachineState *machine)
MemoryRegion *bios = g_new(MemoryRegion, 1);
long bios_size;
int64_t kernel_entry;
qemu_irq *i8259;
PCIBus *pci_bus;
ISABus *isa_bus;
I2CBus *smbus;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
MIPSCPU *cpu;
CPUMIPSState *env;
@ -332,46 +354,16 @@ static void mips_fulong2e_init(MachineState *machine)
/* North bridge, Bonito --> IP2 */
pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
/* South bridge */
ide_drive_get(hd, ARRAY_SIZE(hd));
/* South bridge -> IP5 */
vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
&smbus, &isa_bus);
isa_bus = vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 0));
if (!isa_bus) {
error_report("vt82c686b_init error");
exit(1);
}
/* Interrupt controller */
/* The 8259 -> IP5 */
i8259 = i8259_init(isa_bus, env->irq[5]);
isa_bus_irqs(isa_bus, i8259);
vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1));
pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2),
"vt82c686b-usb-uhci");
pci_create_simple(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3),
"vt82c686b-usb-uhci");
smbus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 4),
0xeee1, NULL);
/* TODO: Populate SPD eeprom data. */
smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd));
/* init other devices */
pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
DMA_init(isa_bus, 0);
/* Super I/O */
isa_create_simple(isa_bus, "i8042");
mc146818_rtc_init(isa_bus, 2000, NULL);
serial_hds_isa_init(isa_bus, 0, MAX_SERIAL_PORTS);
parallel_hds_isa_init(isa_bus, 1);
/* Sound card */
audio_init(pci_bus);
/* Network card */
/* Network card: RTL8139D */
network_init(pci_bus);
}

13
hw/mips/mips_jazz.c
View file

@ -27,7 +27,9 @@
#include "hw/mips/mips.h"
#include "hw/mips/cpudevs.h"
#include "hw/i386/pc.h"
#include "hw/dma/i8257.h"
#include "hw/char/serial.h"
#include "hw/char/parallel.h"
#include "hw/isa/isa.h"
#include "hw/block/fdc.h"
#include "sysemu/sysemu.h"
@ -41,7 +43,7 @@
#include "hw/timer/i8254.h"
#include "hw/display/vga.h"
#include "hw/audio/pcspk.h"
#include "sysemu/block-backend.h"
#include "hw/input/i8042.h"
#include "hw/sysbus.h"
#include "exec/address-spaces.h"
#include "sysemu/qtest.h"
@ -147,6 +149,7 @@ static void mips_jazz_init(MachineState *machine,
MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *bios = g_new(MemoryRegion, 1);
MemoryRegion *bios2 = g_new(MemoryRegion, 1);
ESPState *esp;
/* init CPUs */
cpu = MIPS_CPU(cpu_create(machine->cpu_type));
@ -219,7 +222,7 @@ static void mips_jazz_init(MachineState *machine,
/* ISA devices */
i8259 = i8259_init(isa_bus, env->irq[4]);
isa_bus_irqs(isa_bus, i8259);
DMA_init(isa_bus, 0);
i8257_dma_init(isa_bus, 0);
pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
pcspk_init(isa_bus, pit);
@ -278,9 +281,9 @@ static void mips_jazz_init(MachineState *machine,
}
/* SCSI adapter */
esp_init(0x80002000, 0,
rc4030_dma_read, rc4030_dma_write, dmas[0],
qdev_get_gpio_in(rc4030, 5), &esp_reset, &dma_enable);
esp = esp_init(0x80002000, 0, rc4030_dma_read, rc4030_dma_write, dmas[0],
qdev_get_gpio_in(rc4030, 5), &esp_reset, &dma_enable);
scsi_bus_legacy_handle_cmdline(&esp->bus);
/* Floppy */
for (n = 0; n < MAX_FD; n++) {

48
hw/mips/mips_malta.c
View file

@ -27,12 +27,12 @@
#include "cpu.h"
#include "hw/hw.h"
#include "hw/i386/pc.h"
#include "hw/isa/superio.h"
#include "hw/dma/i8257.h"
#include "hw/char/serial.h"
#include "hw/block/fdc.h"
#include "net/net.h"
#include "hw/boards.h"
#include "hw/i2c/smbus.h"
#include "sysemu/block-backend.h"
#include "hw/block/flash.h"
#include "hw/mips/mips.h"
#include "hw/mips/cpudevs.h"
@ -1002,10 +1002,8 @@ void mips_malta_init(MachineState *machine)
qemu_irq cbus_irq, i8259_irq;
int piix4_devfn;
I2CBus *smbus;
int i;
DriveInfo *dinfo;
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
DriveInfo *fd[MAX_FD];
int fl_idx = 0;
int fl_sectors = bios_size >> 16;
int be;
@ -1020,15 +1018,6 @@ void mips_malta_init(MachineState *machine)
qdev_init_nofail(dev);
/* Make sure the first 3 serial ports are associated with a device. */
for(i = 0; i < 3; i++) {
if (!serial_hds[i]) {
char label[32];
snprintf(label, sizeof(label), "serial%d", i);
serial_hds[i] = qemu_chr_new(label, "null");
}
}
/* create CPU */
mips_create_cpu(s, machine->cpu_type, &cbus_irq, &i8259_irq);
@ -1059,16 +1048,19 @@ void mips_malta_init(MachineState *machine)
memory_region_add_subregion(system_memory, 512 << 20, ram_low_postio);
}
/* generate SPD EEPROM data */
generate_eeprom_spd(&smbus_eeprom_buf[0 * 256], ram_size);
generate_eeprom_serial(&smbus_eeprom_buf[6 * 256]);
#ifdef TARGET_WORDS_BIGENDIAN
be = 1;
#else
be = 0;
#endif
/* FPGA */
/* Make sure the second serial port is associated with a device. */
if (!serial_hds[2]) {
serial_hds[2] = qemu_chr_new("fpga-uart", "null");
}
/* The CBUS UART is attached to the MIPS CPU INT2 pin, ie interrupt 4 */
malta_fpga_init(system_memory, FPGA_ADDRESS, cbus_irq, serial_hds[2]);
@ -1205,22 +1197,18 @@ void mips_malta_init(MachineState *machine)
pci_create_simple(pci_bus, piix4_devfn + 2, "piix4-usb-uhci");
smbus = piix4_pm_init(pci_bus, piix4_devfn + 3, 0x1100,
isa_get_irq(NULL, 9), NULL, 0, NULL);
pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
i8257_dma_init(isa_bus, 0);
mc146818_rtc_init(isa_bus, 2000, NULL);
/* generate SPD EEPROM data */
generate_eeprom_spd(&smbus_eeprom_buf[0 * 256], ram_size);
generate_eeprom_serial(&smbus_eeprom_buf[6 * 256]);
smbus_eeprom_init(smbus, 8, smbus_eeprom_buf, smbus_eeprom_size);
g_free(smbus_eeprom_buf);
pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
DMA_init(isa_bus, 0);
/* Super I/O */
isa_create_simple(isa_bus, "i8042");
mc146818_rtc_init(isa_bus, 2000, NULL);
serial_hds_isa_init(isa_bus, 0, 2);
parallel_hds_isa_init(isa_bus, 1);
for(i = 0; i < MAX_FD; i++) {
fd[i] = drive_get(IF_FLOPPY, 0, i);
}
fdctrl_init_isa(isa_bus, fd);
/* Super I/O: SMS FDC37M817 */
isa_create_simple(isa_bus, TYPE_FDC37M81X_SUPERIO);
/* Network card */
network_init(pci_bus);

3
hw/mips/mips_r4k.c
View file

@ -28,6 +28,7 @@
#include "hw/loader.h"
#include "elf.h"
#include "hw/timer/mc146818rtc.h"
#include "hw/input/i8042.h"
#include "hw/timer/i8254.h"
#include "sysemu/block-backend.h"
#include "exec/address-spaces.h"
@ -286,7 +287,7 @@ void mips_r4k_init(MachineState *machine)
hd[MAX_IDE_DEVS * i],
hd[MAX_IDE_DEVS * i + 1]);
isa_create_simple(isa_bus, "i8042");
isa_create_simple(isa_bus, TYPE_I8042);
}
static void mips_machine_init(MachineClass *mc)

61
hw/pci/pci.c
View file

@ -1815,49 +1815,48 @@ PciInfoList *qmp_query_pci(Error **errp)
return head;
}
static const char * const pci_nic_models[] = {
"ne2k_pci",
"i82551",
"i82557b",
"i82559er",
"rtl8139",
"e1000",
"pcnet",
"virtio",
"sungem",
NULL
};
static const char * const pci_nic_names[] = {
"ne2k_pci",
"i82551",
"i82557b",
"i82559er",
"rtl8139",
"e1000",
"pcnet",
"virtio-net-pci",
"sungem",
NULL
};
/* Initialize a PCI NIC. */
PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus,
const char *default_model,
const char *default_devaddr)
{
const char *devaddr = nd->devaddr ? nd->devaddr : default_devaddr;
GSList *list;
GPtrArray *pci_nic_models;
PCIBus *bus;
PCIDevice *pci_dev;
DeviceState *dev;
int devfn;
int i;
if (qemu_show_nic_models(nd->model, pci_nic_models)) {
if (nd->model && !strcmp(nd->model, "virtio")) {
g_free(nd->model);
nd->model = g_strdup("virtio-net-pci");
}
list = object_class_get_list_sorted(TYPE_PCI_DEVICE, false);
pci_nic_models = g_ptr_array_new();
while (list) {
DeviceClass *dc = OBJECT_CLASS_CHECK(DeviceClass, list->data,
TYPE_DEVICE);
GSList *next;
if (test_bit(DEVICE_CATEGORY_NETWORK, dc->categories) &&
dc->user_creatable) {
const char *name = object_class_get_name(list->data);
g_ptr_array_add(pci_nic_models, (gpointer)name);
}
next = list->next;
g_slist_free_1(list);
list = next;
}
g_ptr_array_add(pci_nic_models, NULL);
if (qemu_show_nic_models(nd->model, (const char **)pci_nic_models->pdata)) {
exit(0);
}
i = qemu_find_nic_model(nd, pci_nic_models, default_model);
i = qemu_find_nic_model(nd, (const char **)pci_nic_models->pdata,
default_model);
if (i < 0) {
exit(1);
}
@ -1865,15 +1864,15 @@ PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus,
bus = pci_get_bus_devfn(&devfn, rootbus, devaddr);
if (!bus) {
error_report("Invalid PCI device address %s for device %s",
devaddr, pci_nic_names[i]);
devaddr, nd->model);
exit(1);
}
pci_dev = pci_create(bus, devfn, pci_nic_names[i]);
pci_dev = pci_create(bus, devfn, nd->model);
dev = &pci_dev->qdev;
qdev_set_nic_properties(dev, nd);
qdev_init_nofail(dev);
g_ptr_array_free(pci_nic_models, true);
return pci_dev;
}

2
hw/ppc/e500.c
View file

@ -916,7 +916,7 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
if (pci_bus) {
/* Register network interfaces. */
for (i = 0; i < nb_nics; i++) {
pci_nic_init_nofail(&nd_table[i], pci_bus, "virtio", NULL);
pci_nic_init_nofail(&nd_table[i], pci_bus, "virtio-net-pci", NULL);
}
}

1
hw/ppc/mac_newworld.c
View file

@ -69,7 +69,6 @@
#include "sysemu/kvm.h"
#include "kvm_ppc.h"
#include "hw/usb.h"
#include "sysemu/block-backend.h"
#include "exec/address-spaces.h"
#include "hw/sysbus.h"
#include "qemu/cutils.h"

1
hw/ppc/mac_oldworld.c
View file

@ -44,7 +44,6 @@
#include "qemu/error-report.h"
#include "sysemu/kvm.h"
#include "kvm_ppc.h"
#include "sysemu/block-backend.h"
#include "exec/address-spaces.h"
#include "qemu/cutils.h"

7
hw/ppc/prep.c
View file

@ -41,9 +41,9 @@
#include "hw/ide.h"
#include "hw/loader.h"
#include "hw/timer/mc146818rtc.h"
#include "hw/input/i8042.h"
#include "hw/isa/pc87312.h"
#include "hw/net/ne2000-isa.h"
#include "sysemu/block-backend.h"
#include "sysemu/arch_init.h"
#include "sysemu/kvm.h"
#include "sysemu/qtest.h"
@ -612,7 +612,7 @@ static void ppc_prep_init(MachineState *machine)
isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci), "isa.0"));
/* Super I/O (parallel + serial ports) */
isa = isa_create(isa_bus, TYPE_PC87312);
isa = isa_create(isa_bus, TYPE_PC87312_SUPERIO);
dev = DEVICE(isa);
qdev_prop_set_uint8(dev, "config", 13); /* fdc, ser0, ser1, par0 */
qdev_init_nofail(dev);
@ -641,7 +641,6 @@ static void ppc_prep_init(MachineState *machine)
hd[2 * i],
hd[2 * i + 1]);
}
isa_create_simple(isa_bus, "i8042");
cpu = POWERPC_CPU(first_cpu);
sysctrl->reset_irq = cpu->env.irq_inputs[PPC6xx_INPUT_HRESET];
@ -771,7 +770,7 @@ static void ibm_40p_init(MachineState *machine)
/* add some more devices */
if (defaults_enabled()) {
isa_create_simple(isa_bus, "i8042");
isa_create_simple(isa_bus, TYPE_I8042);
m48t59 = NVRAM(isa_create_simple(isa_bus, "isa-m48t59"));
dev = DEVICE(isa_create(isa_bus, "cs4231a"));

12
hw/scsi/esp.c
View file

@ -618,11 +618,11 @@ static const MemoryRegionOps sysbus_esp_mem_ops = {
.valid.accepts = esp_mem_accepts,
};
void esp_init(hwaddr espaddr, int it_shift,
ESPDMAMemoryReadWriteFunc dma_memory_read,
ESPDMAMemoryReadWriteFunc dma_memory_write,
void *dma_opaque, qemu_irq irq, qemu_irq *reset,
qemu_irq *dma_enable)
ESPState *esp_init(hwaddr espaddr, int it_shift,
ESPDMAMemoryReadWriteFunc dma_memory_read,
ESPDMAMemoryReadWriteFunc dma_memory_write,
void *dma_opaque, qemu_irq irq, qemu_irq *reset,
qemu_irq *dma_enable)
{
DeviceState *dev;
SysBusDevice *s;
@ -644,6 +644,8 @@ void esp_init(hwaddr espaddr, int it_shift,
sysbus_mmio_map(s, 0, espaddr);
*reset = qdev_get_gpio_in(dev, 0);
*dma_enable = qdev_get_gpio_in(dev, 1);
return esp;
}
static const struct SCSIBusInfo esp_scsi_info = {

1
hw/scsi/mptendian.c
View file

@ -24,7 +24,6 @@
#include "hw/hw.h"
#include "hw/pci/pci.h"
#include "sysemu/dma.h"
#include "sysemu/block-backend.h"
#include "hw/pci/msi.h"
#include "qemu/iov.h"
#include "hw/scsi/scsi.h"

2
hw/scsi/scsi-bus.c
View file

@ -944,7 +944,7 @@ static int scsi_req_xfer(SCSICommand *cmd, SCSIDevice *dev, uint8_t *buf)
break;
case WRITE_SAME_10:
case WRITE_SAME_16:
cmd->xfer = dev->blocksize;
cmd->xfer = buf[1] & 1 ? 0 : dev->blocksize;
break;
case READ_CAPACITY_10:
cmd->xfer = 8;

17
hw/scsi/scsi-disk.c
View file

@ -704,6 +704,21 @@ static int scsi_disk_emulate_inquiry(SCSIRequest *req, uint8_t *outbuf)
page_code);
return -1;
}
if (s->qdev.type == TYPE_DISK) {
int max_transfer_blk = blk_get_max_transfer(s->qdev.conf.blk);
int max_io_sectors_blk =
max_transfer_blk / s->qdev.blocksize;
max_io_sectors =
MIN_NON_ZERO(max_io_sectors_blk, max_io_sectors);
/* min_io_size and opt_io_size can't be greater than
* max_io_sectors */
min_io_size =
MIN_NON_ZERO(min_io_size, max_io_sectors);
opt_io_size =
MIN_NON_ZERO(opt_io_size, max_io_sectors);
}
/* required VPD size with unmap support */
buflen = 0x40;
memset(outbuf + 4, 0, buflen - 4);
@ -1792,7 +1807,7 @@ static void scsi_disk_emulate_write_same(SCSIDiskReq *r, uint8_t *inbuf)
return;
}
if (buffer_is_zero(inbuf, s->qdev.blocksize)) {
if ((req->cmd.buf[1] & 0x1) || buffer_is_zero(inbuf, s->qdev.blocksize)) {
int flags = (req->cmd.buf[1] & 0x8) ? BDRV_REQ_MAY_UNMAP : 0;
/* The request is used as the AIO opaque value, so add a ref. */

1
hw/sd/core.c
View file

@ -21,7 +21,6 @@
#include "qemu/osdep.h"
#include "hw/qdev-core.h"
#include "sysemu/block-backend.h"
#include "hw/sd/sd.h"
#include "trace.h"

5
hw/sparc/sun4m.c
View file

@ -44,7 +44,6 @@
#include "hw/empty_slot.h"
#include "hw/loader.h"
#include "elf.h"
#include "sysemu/block-backend.h"
#include "trace.h"
#include "qemu/cutils.h"
@ -99,10 +98,6 @@ struct sun4m_hwdef {
uint8_t nvram_machine_id;
};
void DMA_init(ISABus *bus, int high_page_enable)
{
}
static void fw_cfg_boot_set(void *opaque, const char *boot_device,
Error **errp)
{

6
hw/sparc64/sun4u.c
View file

@ -34,7 +34,9 @@
#include "hw/pci-host/sabre.h"
#include "hw/i386/pc.h"
#include "hw/char/serial.h"
#include "hw/char/parallel.h"
#include "hw/timer/m48t59.h"
#include "hw/input/i8042.h"
#include "hw/block/fdc.h"
#include "net/net.h"
#include "qemu/timer.h"
@ -89,10 +91,6 @@ typedef struct EbusState {
#define TYPE_EBUS "ebus"
#define EBUS(obj) OBJECT_CHECK(EbusState, (obj), TYPE_EBUS)
void DMA_init(ISABus *bus, int high_page_enable)
{
}
static void fw_cfg_boot_set(void *opaque, const char *boot_device,
Error **errp)
{

2
hw/tricore/tricore_testboard.c
View file

@ -28,9 +28,7 @@
#include "sysemu/sysemu.h"
#include "hw/boards.h"
#include "hw/loader.h"
#include "sysemu/block-backend.h"
#include "exec/address-spaces.h"
#include "hw/block/flash.h"
#include "elf.h"
#include "hw/tricore/tricore.h"
#include "qemu/error-report.h"

1
hw/unicore32/puv3.c
View file

@ -20,6 +20,7 @@
#undef DEBUG_PUV3
#include "hw/unicore32/puv3.h"
#include "hw/input/i8042.h"
#define KERNEL_LOAD_ADDR 0x03000000
#define KERNEL_MAX_SIZE 0x00800000 /* Just a guess */