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aspeed: calculate the RAM size bits at realize time

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There is no need to do this at each reset as the RAM size will not
change.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Message-id: 1473438177-26079-12-git-send-email-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Cédric Le Goater 2016-09-22 18:13:06 +01:00 • committed by Peter Maydell
parent 67077e3014
commit 3755f9e316
2 changed files with 15 additions and 2 deletions
Download patch file Download diff file Expand all files Collapse all files

16
hw/misc/aspeed_sdmc.c
View file

@ -192,7 +192,7 @@ static void aspeed_sdmc_reset(DeviceState *dev)
case AST2400_A0_SILICON_REV: case AST2400_A0_SILICON_REV:
s->regs[R_CONF] |= s->regs[R_CONF] |=
ASPEED_SDMC_VGA_COMPAT | ASPEED_SDMC_VGA_COMPAT |
ASPEED_SDMC_DRAM_SIZE(ast2400_rambits()); ASPEED_SDMC_DRAM_SIZE(s->ram_bits);
break; break;
case AST2500_A0_SILICON_REV: case AST2500_A0_SILICON_REV:
@ -200,7 +200,7 @@ static void aspeed_sdmc_reset(DeviceState *dev)
s->regs[R_CONF] |= s->regs[R_CONF] |=
ASPEED_SDMC_HW_VERSION(1) | ASPEED_SDMC_HW_VERSION(1) |
ASPEED_SDMC_VGA_APERTURE(ASPEED_SDMC_VGA_64MB) | ASPEED_SDMC_VGA_APERTURE(ASPEED_SDMC_VGA_64MB) |
ASPEED_SDMC_DRAM_SIZE(ast2500_rambits()); ASPEED_SDMC_DRAM_SIZE(s->ram_bits);
break; break;
default: default:
@ -219,6 +219,18 @@ static void aspeed_sdmc_realize(DeviceState *dev, Error **errp)
return; return;
} }
switch (s->silicon_rev) {
case AST2400_A0_SILICON_REV:
s->ram_bits = ast2400_rambits();
break;
case AST2500_A0_SILICON_REV:
case AST2500_A1_SILICON_REV:
s->ram_bits = ast2500_rambits();
break;
default:
g_assert_not_reached();
}
memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_sdmc_ops, s, memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_sdmc_ops, s,
TYPE_ASPEED_SDMC, 0x1000); TYPE_ASPEED_SDMC, 0x1000);
sysbus_init_mmio(sbd, &s->iomem); sysbus_init_mmio(sbd, &s->iomem);

1
include/hw/misc/aspeed_sdmc.h
View file

@ -25,6 +25,7 @@ typedef struct AspeedSDMCState {
uint32_t regs[ASPEED_SDMC_NR_REGS]; uint32_t regs[ASPEED_SDMC_NR_REGS];
uint32_t silicon_rev; uint32_t silicon_rev;
uint32_t ram_bits;
} AspeedSDMCState; } AspeedSDMCState;