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Merge branch 'realize-isa.v2' of git://github.com/afaerber/qemu-cpu

Browse source 
* 'realize-isa.v2' of git://github.com/afaerber/qemu-cpu:
  qdev: Drop FROM_QBUS() macro
  isa: QOM'ify ISADevice
  isa: QOM'ify ISABus
  i8259: Convert PICCommonState to use QOM realizefn
  kvm/i8259: QOM'ify some more
  i8259: QOM'ify some more
  i8254: Convert PITCommonState to QOM realizefn
  kvm/i8254: QOM'ify some more
  i8254: QOM'ify some more
  isa: Use realizefn for ISADevice
  cs4231a: QOM'ify some more
  gus: QOM'ify some more
This commit is contained in:
Blue Swirl 2013-06-15 10:53:44 +00:00
commit 371a775dc1
53 changed files with 533 additions and 389 deletions
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48
hw/intc/i8259.c
View file

@ -41,6 +41,20 @@
//#define DEBUG_IRQ_LATENCY
//#define DEBUG_IRQ_COUNT
#define TYPE_I8259 "isa-i8259"
#define PIC_CLASS(class) OBJECT_CLASS_CHECK(PICClass, (class), TYPE_I8259)
#define PIC_GET_CLASS(obj) OBJECT_GET_CLASS(PICClass, (obj), TYPE_I8259)
/**
* PICClass:
* @parent_realize: The parent's realizefn.
*/
typedef struct PICClass {
PICCommonClass parent_class;
DeviceRealize parent_realize;
} PICClass;
#if defined(DEBUG_PIC) || defined(DEBUG_IRQ_COUNT)
static int irq_level[16];
#endif
@ -398,15 +412,18 @@ static const MemoryRegionOps pic_elcr_ioport_ops = {
},
};
static void pic_init(PICCommonState *s)
static void pic_realize(DeviceState *dev, Error **err)
{
DeviceState *dev = DEVICE(s);
PICCommonState *s = PIC_COMMON(dev);
PICClass *pc = PIC_GET_CLASS(dev);
memory_region_init_io(&s->base_io, &pic_base_ioport_ops, s, "pic", 2);
memory_region_init_io(&s->elcr_io, &pic_elcr_ioport_ops, s, "elcr", 1);
qdev_init_gpio_out(dev, s->int_out, ARRAY_SIZE(s->int_out));
qdev_init_gpio_in(dev, pic_set_irq, 8);
pc->parent_realize(dev, err);
}
void pic_info(Monitor *mon, const QDict *qdict)
@ -448,25 +465,28 @@ void irq_info(Monitor *mon, const QDict *qdict)
qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq)
{
qemu_irq *irq_set;
ISADevice *dev;
DeviceState *dev;
ISADevice *isadev;
int i;
irq_set = g_malloc(ISA_NUM_IRQS * sizeof(qemu_irq));
dev = i8259_init_chip("isa-i8259", bus, true);
isadev = i8259_init_chip(TYPE_I8259, bus, true);
dev = DEVICE(isadev);
qdev_connect_gpio_out(&dev->qdev, 0, parent_irq);
qdev_connect_gpio_out(dev, 0, parent_irq);
for (i = 0 ; i < 8; i++) {
irq_set[i] = qdev_get_gpio_in(&dev->qdev, i);
irq_set[i] = qdev_get_gpio_in(dev, i);
}
isa_pic = &dev->qdev;
isa_pic = dev;
dev = i8259_init_chip("isa-i8259", bus, false);
isadev = i8259_init_chip(TYPE_I8259, bus, false);
dev = DEVICE(isadev);
qdev_connect_gpio_out(&dev->qdev, 0, irq_set[2]);
qdev_connect_gpio_out(dev, 0, irq_set[2]);
for (i = 0 ; i < 8; i++) {
irq_set[i + 8] = qdev_get_gpio_in(&dev->qdev, i);
irq_set[i + 8] = qdev_get_gpio_in(dev, i);
}
slave_pic = PIC_COMMON(dev);
@ -476,18 +496,20 @@ qemu_irq *i8259_init(ISABus *bus, qemu_irq parent_irq)
static void i8259_class_init(ObjectClass *klass, void *data)
{
PICCommonClass *k = PIC_COMMON_CLASS(klass);
PICClass *k = PIC_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
k->init = pic_init;
k->parent_realize = dc->realize;
dc->realize = pic_realize;
dc->reset = pic_reset;
}
static const TypeInfo i8259_info = {
.name = "isa-i8259",
.name = TYPE_I8259,
.instance_size = sizeof(PICCommonState),
.parent = TYPE_PIC_COMMON,
.class_init = i8259_class_init,
.class_size = sizeof(PICClass),
};
static void pic_register_types(void)

30
hw/intc/i8259_common.c
View file

@ -66,35 +66,32 @@ static int pic_dispatch_post_load(void *opaque, int version_id)
return 0;
}
static int pic_init_common(ISADevice *dev)
static void pic_common_realize(DeviceState *dev, Error **errp)
{
PICCommonState *s = PIC_COMMON(dev);
PICCommonClass *info = PIC_COMMON_GET_CLASS(s);
info->init(s);
isa_register_ioport(NULL, &s->base_io, s->iobase);
if (s->elcr_addr != -1) {
isa_register_ioport(NULL, &s->elcr_io, s->elcr_addr);
}
qdev_set_legacy_instance_id(DEVICE(dev), s->iobase, 1);
return 0;
qdev_set_legacy_instance_id(dev, s->iobase, 1);
}
ISADevice *i8259_init_chip(const char *name, ISABus *bus, bool master)
{
ISADevice *dev;
DeviceState *dev;
ISADevice *isadev;
dev = isa_create(bus, name);
qdev_prop_set_uint32(&dev->qdev, "iobase", master ? 0x20 : 0xa0);
qdev_prop_set_uint32(&dev->qdev, "elcr_addr", master ? 0x4d0 : 0x4d1);
qdev_prop_set_uint8(&dev->qdev, "elcr_mask", master ? 0xf8 : 0xde);
qdev_prop_set_bit(&dev->qdev, "master", master);
qdev_init_nofail(&dev->qdev);
isadev = isa_create(bus, name);
dev = DEVICE(isadev);
qdev_prop_set_uint32(dev, "iobase", master ? 0x20 : 0xa0);
qdev_prop_set_uint32(dev, "elcr_addr", master ? 0x4d0 : 0x4d1);
qdev_prop_set_uint8(dev, "elcr_mask", master ? 0xf8 : 0xde);
qdev_prop_set_bit(dev, "master", master);
qdev_init_nofail(dev);
return dev;
return isadev;
}
static const VMStateDescription vmstate_pic_common = {
@ -135,13 +132,12 @@ static Property pic_properties_common[] = {
static void pic_common_class_init(ObjectClass *klass, void *data)
{
ISADeviceClass *ic = ISA_DEVICE_CLASS(klass);
DeviceClass *dc = DEVICE_CLASS(klass);
dc->vmsd = &vmstate_pic_common;
dc->no_user = 1;
dc->props = pic_properties_common;
ic->init = pic_init_common;
dc->realize = pic_common_realize;
}
static const TypeInfo pic_common_type = {