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Aspeed patches :

Browse source 
* New model for the Aspeed LPC controller
 * Misc cleanups
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Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20210309' into staging

Aspeed patches :

* New model for the Aspeed LPC controller
* Misc cleanups

# gpg: Signature made Tue 09 Mar 2021 11:54:25 GMT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* remotes/legoater/tags/pull-aspeed-20210309:
  hw/misc: Model KCS devices in the Aspeed LPC controller
  hw/misc: Add a basic Aspeed LPC controller model
  hw/arm: ast2600: Correct the iBT interrupt ID
  hw/arm: ast2600: Set AST2600_MAX_IRQ to value from datasheet
  hw/arm: ast2600: Force a multiple of 32 of IRQs for the GIC
  hw/arm/aspeed: Fix location of firmware images in documentation
  arm/ast2600: Fix SMP booting with -kernel

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2021-03-11 11:18:27 +00:00
commit 363fc96305
7 changed files with 625 additions and 19 deletions
Download patch file Download diff file Expand all files Collapse all files

3
include/hw/arm/aspeed_soc.h
View file

@ -28,6 +28,7 @@
#include "hw/sd/aspeed_sdhci.h"
#include "hw/usb/hcd-ehci.h"
#include "qom/object.h"
#include "hw/misc/aspeed_lpc.h"
#define ASPEED_SPIS_NUM 2
#define ASPEED_EHCIS_NUM 2
@ -61,6 +62,7 @@ struct AspeedSoCState {
AspeedGPIOState gpio_1_8v;
AspeedSDHCIState sdhci;
AspeedSDHCIState emmc;
AspeedLPCState lpc;
};
#define TYPE_ASPEED_SOC "aspeed-soc"
@ -130,6 +132,7 @@ enum {
ASPEED_DEV_SDRAM,
ASPEED_DEV_XDMA,
ASPEED_DEV_EMMC,
ASPEED_DEV_KCS,
};
#endif /* ASPEED_SOC_H */

47
include/hw/misc/aspeed_lpc.h Normal file
View file

@ -0,0 +1,47 @@
/*
* ASPEED LPC Controller
*
* Copyright (C) 2017-2018 IBM Corp.
*
* This code is licensed under the GPL version 2 or later. See
* the COPYING file in the top-level directory.
*/
#ifndef ASPEED_LPC_H
#define ASPEED_LPC_H
#include "hw/sysbus.h"
#include <stdint.h>
#define TYPE_ASPEED_LPC "aspeed.lpc"
#define ASPEED_LPC(obj) OBJECT_CHECK(AspeedLPCState, (obj), TYPE_ASPEED_LPC)
#define ASPEED_LPC_NR_REGS (0x260 >> 2)
enum aspeed_lpc_subdevice {
aspeed_lpc_kcs_1 = 0,
aspeed_lpc_kcs_2,
aspeed_lpc_kcs_3,
aspeed_lpc_kcs_4,
aspeed_lpc_ibt,
};
#define ASPEED_LPC_NR_SUBDEVS 5
typedef struct AspeedLPCState {
/* <private> */
SysBusDevice parent;
/*< public >*/
MemoryRegion iomem;
qemu_irq irq;
qemu_irq subdevice_irqs[ASPEED_LPC_NR_SUBDEVS];
uint32_t subdevice_irqs_pending;
uint32_t regs[ASPEED_LPC_NR_REGS];
uint32_t hicr7;
} AspeedLPCState;
#endif /* _ASPEED_LPC_H_ */