mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-03 07:43:54 -06:00
Fix / update PowerPC BookE definitions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2543 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
j_mayer
parent
4710357290
commit
363be49c86
2 changed files with 189 additions and 43 deletions
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@ -893,11 +893,11 @@ static void gen_spr_G2 (CPUPPCState *env)
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&spr_read_generic, SPR_NOACCESS,
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0x00000000);
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/* Exception processing */
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spr_register(env, SPR_CSRR0, "CSRR0",
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spr_register(env, SPR_BOOKE_CSRR0, "CSRR0",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_CSRR1, "CSRR1",
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spr_register(env, SPR_BOOKE_CSRR1, "CSRR1",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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@ -1060,11 +1060,27 @@ static void gen_spr_BookE (CPUPPCState *env)
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&spr_read_generic, &spr_write_pir,
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0x00000000);
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/* Interrupt processing */
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spr_register(env, SPR_CSRR0, "CSRR0",
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spr_register(env, SPR_BOOKE_CSRR0, "CSRR0",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_CSRR1, "CSRR1",
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spr_register(env, SPR_BOOKE_CSRR1, "CSRR1",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_DSRR0, "DSRR0",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_DSRR1, "DSRR1",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_MCSRR0, "MCSRR0",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_MCSRR1, "MCSRR1",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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@ -1137,7 +1153,12 @@ static void gen_spr_BookE (CPUPPCState *env)
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_EVPR, "EVPR",
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spr_register(env, SPR_BOOKE_IVPR, "IVPR",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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/* Exception vectors */
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spr_register(env, SPR_BOOKE_IVPR, "IVPR",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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@ -1205,6 +1226,30 @@ static void gen_spr_BookE (CPUPPCState *env)
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_IVOR32, "IVOR32",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_IVOR33, "IVOR33",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_IVOR34, "IVOR34",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_IVOR35, "IVOR35",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_IVOR36, "IVOR36",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_IVOR37, "IVOR37",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_PID, "PID",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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@ -1265,6 +1310,89 @@ static void gen_spr_BookE (CPUPPCState *env)
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0x00000000);
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}
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/* FSL storage control registers */
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static void gen_spr_BookE_FSL (CPUPPCState *env)
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{
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/* TLB assist registers */
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spr_register(env, SPR_BOOKE_MAS0, "MAS0",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_MAS1, "MAS2",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_MAS2, "MAS3",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_MAS3, "MAS4",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_MAS4, "MAS5",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_MAS6, "MAS6",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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spr_register(env, SPR_BOOKE_MAS7, "MAS7",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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if (env->nb_pids > 1) {
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spr_register(env, SPR_BOOKE_PID1, "PID1",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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}
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if (env->nb_pids > 2) {
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spr_register(env, SPR_BOOKE_PID2, "PID2",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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}
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spr_register(env, SPR_BOOKE_MMUCFG, "MMUCFG",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, SPR_NOACCESS,
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0x00000000); /* TOFIX */
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spr_register(env, SPR_BOOKE_MMUCSR0, "MMUCSR0",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, &spr_write_generic,
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0x00000000); /* TOFIX */
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switch (env->nb_ways) {
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case 4:
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spr_register(env, SPR_BOOKE_TLB3CFG, "TLB3CFG",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, SPR_NOACCESS,
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0x00000000); /* TOFIX */
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/* Fallthru */
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case 3:
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spr_register(env, SPR_BOOKE_TLB2CFG, "TLB2CFG",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, SPR_NOACCESS,
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0x00000000); /* TOFIX */
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/* Fallthru */
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case 2:
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spr_register(env, SPR_BOOKE_TLB1CFG, "TLB1CFG",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, SPR_NOACCESS,
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0x00000000); /* TOFIX */
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/* Fallthru */
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case 1:
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spr_register(env, SPR_BOOKE_TLB0CFG, "TLB0CFG",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, SPR_NOACCESS,
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0x00000000); /* TOFIX */
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/* Fallthru */
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case 0:
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default:
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break;
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}
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}
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/* SPR specific to PowerPC 440 implementation */
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static void gen_spr_440 (CPUPPCState *env)
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{
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@ -1361,27 +1489,27 @@ static void gen_spr_440 (CPUPPCState *env)
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0x00000000);
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/* Cache debug */
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/* XXX : not implemented */
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spr_register(env, SPR_440_DCBTRH, "DCBTRH",
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spr_register(env, SPR_BOOKE_DCBTRH, "DCBTRH",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, SPR_NOACCESS,
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0x00000000);
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/* XXX : not implemented */
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spr_register(env, SPR_440_DCBTRL, "DCBTRL",
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spr_register(env, SPR_BOOKE_DCBTRL, "DCBTRL",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, SPR_NOACCESS,
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0x00000000);
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/* XXX : not implemented */
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spr_register(env, SPR_4xx_ICDBDR, "ICDBDR",
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spr_register(env, SPR_BOOKE_ICBDR, "ICBDR",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, SPR_NOACCESS,
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0x00000000);
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/* XXX : not implemented */
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spr_register(env, SPR_440_ICBTRH, "ICBTRH",
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spr_register(env, SPR_BOOKE_ICBTRH, "ICBTRH",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, SPR_NOACCESS,
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0x00000000);
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/* XXX : not implemented */
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spr_register(env, SPR_440_ICBTRL, "ICBTRL",
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spr_register(env, SPR_BOOKE_ICBTRL, "ICBTRL",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, SPR_NOACCESS,
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0x00000000);
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@ -1426,7 +1554,7 @@ static void gen_spr_40x (CPUPPCState *env)
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&spr_read_generic, &spr_write_generic,
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0x00000000);
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/* XXX : not implemented */
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spr_register(env, SPR_4xx_ICDBDR, "ICDBDR",
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spr_register(env, SPR_BOOKE_ICBDR, "ICBDR",
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SPR_NOACCESS, SPR_NOACCESS,
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&spr_read_generic, SPR_NOACCESS,
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0x00000000);
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@ -1861,6 +1989,7 @@ static void init_ppc_proc (CPUPPCState *env, ppc_def_t *def)
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/* Time base */
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gen_tbl(env);
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gen_spr_BookE(env);
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gen_spr_BookE_FSL(env);
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env->nb_BATs = 0;
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env->nb_tlb = 64;
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env->nb_ways = 1;
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