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tcg: Add 128-bit guest memory primitives
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson
parent
0bbf501570
commit
35c653c402
6 changed files with 679 additions and 178 deletions
173
tcg/tcg-op.c
173
tcg/tcg-op.c
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@ -3119,6 +3119,37 @@ void tcg_gen_qemu_st_i64(TCGv_i64 val, TCGv addr, TCGArg idx, MemOp memop)
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}
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}
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/*
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* Return true if @mop, without knowledge of the pointer alignment,
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* does not require 16-byte atomicity, and it would be adventagous
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* to avoid a call to a helper function.
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*/
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static bool use_two_i64_for_i128(MemOp mop)
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{
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#ifdef CONFIG_SOFTMMU
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/* Two softmmu tlb lookups is larger than one function call. */
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return false;
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#else
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/*
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* For user-only, two 64-bit operations may well be smaller than a call.
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* Determine if that would be legal for the requested atomicity.
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*/
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switch (mop & MO_ATOM_MASK) {
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case MO_ATOM_NONE:
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case MO_ATOM_IFALIGN_PAIR:
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return true;
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case MO_ATOM_IFALIGN:
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case MO_ATOM_SUBALIGN:
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case MO_ATOM_WITHIN16:
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case MO_ATOM_WITHIN16_PAIR:
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/* In a serialized context, no atomicity is required. */
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return !(tcg_ctx->gen_tb->cflags & CF_PARALLEL);
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default:
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g_assert_not_reached();
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}
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#endif
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}
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static void canonicalize_memop_i128_as_i64(MemOp ret[2], MemOp orig)
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{
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MemOp mop_1 = orig, mop_2;
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@ -3164,93 +3195,113 @@ static void canonicalize_memop_i128_as_i64(MemOp ret[2], MemOp orig)
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ret[1] = mop_2;
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}
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#if TARGET_LONG_BITS == 64
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#define tcg_temp_ebb_new tcg_temp_ebb_new_i64
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#else
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#define tcg_temp_ebb_new tcg_temp_ebb_new_i32
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#endif
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void tcg_gen_qemu_ld_i128(TCGv_i128 val, TCGv addr, TCGArg idx, MemOp memop)
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{
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MemOp mop[2];
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TCGv addr_p8;
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TCGv_i64 x, y;
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MemOpIdx oi = make_memop_idx(memop, idx);
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canonicalize_memop_i128_as_i64(mop, memop);
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tcg_debug_assert((memop & MO_SIZE) == MO_128);
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tcg_debug_assert((memop & MO_SIGN) == 0);
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tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
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addr = plugin_prep_mem_callbacks(addr);
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/* TODO: respect atomicity of the operation. */
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/* TODO: allow the tcg backend to see the whole operation. */
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/*
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* Since there are no global TCGv_i128, there is no visible state
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* changed if the second load faults. Load directly into the two
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* subwords.
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*/
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if ((memop & MO_BSWAP) == MO_LE) {
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x = TCGV128_LOW(val);
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y = TCGV128_HIGH(val);
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if (use_two_i64_for_i128(memop)) {
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MemOp mop[2];
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TCGv addr_p8;
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TCGv_i64 x, y;
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canonicalize_memop_i128_as_i64(mop, memop);
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/*
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* Since there are no global TCGv_i128, there is no visible state
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* changed if the second load faults. Load directly into the two
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* subwords.
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*/
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if ((memop & MO_BSWAP) == MO_LE) {
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x = TCGV128_LOW(val);
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y = TCGV128_HIGH(val);
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} else {
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x = TCGV128_HIGH(val);
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y = TCGV128_LOW(val);
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}
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gen_ldst_i64(INDEX_op_qemu_ld_i64, x, addr, mop[0], idx);
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if ((mop[0] ^ memop) & MO_BSWAP) {
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tcg_gen_bswap64_i64(x, x);
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}
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addr_p8 = tcg_temp_ebb_new();
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tcg_gen_addi_tl(addr_p8, addr, 8);
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gen_ldst_i64(INDEX_op_qemu_ld_i64, y, addr_p8, mop[1], idx);
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tcg_temp_free(addr_p8);
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if ((mop[0] ^ memop) & MO_BSWAP) {
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tcg_gen_bswap64_i64(y, y);
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}
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} else {
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x = TCGV128_HIGH(val);
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y = TCGV128_LOW(val);
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gen_helper_ld_i128(val, cpu_env, addr, tcg_constant_i32(oi));
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}
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gen_ldst_i64(INDEX_op_qemu_ld_i64, x, addr, mop[0], idx);
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if ((mop[0] ^ memop) & MO_BSWAP) {
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tcg_gen_bswap64_i64(x, x);
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}
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addr_p8 = tcg_temp_new();
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tcg_gen_addi_tl(addr_p8, addr, 8);
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gen_ldst_i64(INDEX_op_qemu_ld_i64, y, addr_p8, mop[1], idx);
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tcg_temp_free(addr_p8);
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if ((mop[0] ^ memop) & MO_BSWAP) {
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tcg_gen_bswap64_i64(y, y);
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}
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plugin_gen_mem_callbacks(addr, make_memop_idx(memop, idx),
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QEMU_PLUGIN_MEM_R);
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plugin_gen_mem_callbacks(addr, oi, QEMU_PLUGIN_MEM_R);
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}
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void tcg_gen_qemu_st_i128(TCGv_i128 val, TCGv addr, TCGArg idx, MemOp memop)
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{
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MemOp mop[2];
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TCGv addr_p8;
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TCGv_i64 x, y;
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MemOpIdx oi = make_memop_idx(memop, idx);
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canonicalize_memop_i128_as_i64(mop, memop);
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tcg_debug_assert((memop & MO_SIZE) == MO_128);
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tcg_debug_assert((memop & MO_SIGN) == 0);
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tcg_gen_req_mo(TCG_MO_ST_LD | TCG_MO_ST_ST);
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addr = plugin_prep_mem_callbacks(addr);
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/* TODO: respect atomicity of the operation. */
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/* TODO: allow the tcg backend to see the whole operation. */
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if ((memop & MO_BSWAP) == MO_LE) {
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x = TCGV128_LOW(val);
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y = TCGV128_HIGH(val);
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if (use_two_i64_for_i128(memop)) {
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MemOp mop[2];
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TCGv addr_p8;
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TCGv_i64 x, y;
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canonicalize_memop_i128_as_i64(mop, memop);
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if ((memop & MO_BSWAP) == MO_LE) {
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x = TCGV128_LOW(val);
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y = TCGV128_HIGH(val);
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} else {
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x = TCGV128_HIGH(val);
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y = TCGV128_LOW(val);
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}
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addr_p8 = tcg_temp_ebb_new();
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if ((mop[0] ^ memop) & MO_BSWAP) {
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TCGv_i64 t = tcg_temp_ebb_new_i64();
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tcg_gen_bswap64_i64(t, x);
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gen_ldst_i64(INDEX_op_qemu_st_i64, t, addr, mop[0], idx);
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tcg_gen_bswap64_i64(t, y);
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tcg_gen_addi_tl(addr_p8, addr, 8);
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gen_ldst_i64(INDEX_op_qemu_st_i64, t, addr_p8, mop[1], idx);
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tcg_temp_free_i64(t);
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} else {
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gen_ldst_i64(INDEX_op_qemu_st_i64, x, addr, mop[0], idx);
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tcg_gen_addi_tl(addr_p8, addr, 8);
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gen_ldst_i64(INDEX_op_qemu_st_i64, y, addr_p8, mop[1], idx);
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}
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tcg_temp_free(addr_p8);
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} else {
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x = TCGV128_HIGH(val);
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y = TCGV128_LOW(val);
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gen_helper_st_i128(cpu_env, addr, val, tcg_constant_i32(oi));
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}
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addr_p8 = tcg_temp_new();
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if ((mop[0] ^ memop) & MO_BSWAP) {
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TCGv_i64 t = tcg_temp_ebb_new_i64();
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tcg_gen_bswap64_i64(t, x);
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gen_ldst_i64(INDEX_op_qemu_st_i64, t, addr, mop[0], idx);
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tcg_gen_bswap64_i64(t, y);
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tcg_gen_addi_tl(addr_p8, addr, 8);
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gen_ldst_i64(INDEX_op_qemu_st_i64, t, addr_p8, mop[1], idx);
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tcg_temp_free_i64(t);
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} else {
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gen_ldst_i64(INDEX_op_qemu_st_i64, x, addr, mop[0], idx);
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tcg_gen_addi_tl(addr_p8, addr, 8);
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gen_ldst_i64(INDEX_op_qemu_st_i64, y, addr_p8, mop[1], idx);
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}
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tcg_temp_free(addr_p8);
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plugin_gen_mem_callbacks(addr, make_memop_idx(memop, idx),
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QEMU_PLUGIN_MEM_W);
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plugin_gen_mem_callbacks(addr, oi, QEMU_PLUGIN_MEM_W);
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}
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static void tcg_gen_ext_i32(TCGv_i32 ret, TCGv_i32 val, MemOp opc)
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