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acpi: add ACPIREGS
All those acpi structs are not independent from each other. Various acpi functions expecting multiple acpi structs passed in are a clean indicator for that ;) So this patch bundles all acpi structs in the new ACPIREGS struct, then use it everythere pass around acpi state. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
parent
067866d61c
commit
355bf2e5ba
4 changed files with 145 additions and 143 deletions
48
hw/acpi.h
48
hw/acpi.h
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@ -78,8 +78,9 @@ typedef struct ACPIPMTimer ACPIPMTimer;
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typedef struct ACPIPM1EVT ACPIPM1EVT;
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typedef struct ACPIPM1CNT ACPIPM1CNT;
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typedef struct ACPIGPE ACPIGPE;
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typedef struct ACPIREGS ACPIREGS;
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typedef void (*acpi_update_sci_fn)(ACPIPMTimer *tmr);
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typedef void (*acpi_update_sci_fn)(ACPIREGS *ar);
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struct ACPIPMTimer {
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QEMUTimer *timer;
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@ -106,12 +107,21 @@ struct ACPIGPE {
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uint8_t *en;
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};
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struct ACPIREGS {
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ACPIPMTimer tmr;
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ACPIGPE gpe;
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struct {
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ACPIPM1EVT evt;
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ACPIPM1CNT cnt;
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} pm1;
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};
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/* PM_TMR */
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void acpi_pm_tmr_update(ACPIPMTimer *tmr, bool enable);
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void acpi_pm_tmr_calc_overflow_time(ACPIPMTimer *tmr);
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uint32_t acpi_pm_tmr_get(ACPIPMTimer *tmr);
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void acpi_pm_tmr_init(ACPIPMTimer *tmr, acpi_update_sci_fn update_sci);
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void acpi_pm_tmr_reset(ACPIPMTimer *tmr);
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void acpi_pm_tmr_update(ACPIREGS *ar, bool enable);
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void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar);
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uint32_t acpi_pm_tmr_get(ACPIREGS *ar);
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void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci);
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void acpi_pm_tmr_reset(ACPIREGS *ar);
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#include "qemu-timer.h"
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static inline int64_t acpi_pm_tmr_get_clock(void)
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@ -121,24 +131,24 @@ static inline int64_t acpi_pm_tmr_get_clock(void)
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}
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/* PM1a_EVT: piix and ich9 don't implement PM1b. */
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uint16_t acpi_pm1_evt_get_sts(ACPIPM1EVT *pm1, int64_t overflow_time);
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void acpi_pm1_evt_write_sts(ACPIPM1EVT *pm1, ACPIPMTimer *tmr, uint16_t val);
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void acpi_pm1_evt_power_down(ACPIPM1EVT *pm1, ACPIPMTimer *tmr);
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void acpi_pm1_evt_reset(ACPIPM1EVT *pm1);
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uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar, int64_t overflow_time);
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void acpi_pm1_evt_write_sts(ACPIREGS *ar, uint16_t val);
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void acpi_pm1_evt_power_down(ACPIREGS *ar);
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void acpi_pm1_evt_reset(ACPIREGS *ar);
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/* PM1a_CNT: piix and ich9 don't implement PM1b CNT. */
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void acpi_pm1_cnt_init(ACPIPM1CNT *pm1_cnt, qemu_irq cmos_s3);
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void acpi_pm1_cnt_write(ACPIPM1EVT *pm1a, ACPIPM1CNT *pm1_cnt, uint16_t val);
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void acpi_pm1_cnt_update(ACPIPM1CNT *pm1_cnt,
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void acpi_pm1_cnt_init(ACPIREGS *ar, qemu_irq cmos_s3);
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void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val);
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void acpi_pm1_cnt_update(ACPIREGS *ar,
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bool sci_enable, bool sci_disable);
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void acpi_pm1_cnt_reset(ACPIPM1CNT *pm1_cnt);
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void acpi_pm1_cnt_reset(ACPIREGS *ar);
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/* GPE0 */
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void acpi_gpe_init(ACPIGPE *gpe, uint8_t len);
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void acpi_gpe_blk(ACPIGPE *gpe, uint32_t blk);
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void acpi_gpe_reset(ACPIGPE *gpe);
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void acpi_gpe_init(ACPIREGS *ar, uint8_t len);
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void acpi_gpe_blk(ACPIREGS *ar, uint32_t blk);
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void acpi_gpe_reset(ACPIREGS *ar);
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void acpi_gpe_ioport_writeb(ACPIGPE *gpe, uint32_t addr, uint32_t val);
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uint32_t acpi_gpe_ioport_readb(ACPIGPE *gpe, uint32_t addr);
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void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val);
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uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr);
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#endif /* !QEMU_HW_ACPI_H */
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