mirror of
https://github.com/Motorhead1991/qemu.git
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aspeed_soc: Rename memmap/irqmap enum constants
Some of the enum constant names conflict with the QOM type check macros: ASPEED_GPIO ASPEED_I2C ASPEED_RTC ASPEED_SCU ASPEED_SDHCI ASPEED_SDMC ASPEED_VIC ASPEED_WDT ASPEED_XDMA This needs to be addressed to allow us to transform the QOM type check macros into functions generated by OBJECT_DECLARE_TYPE(). Rename all the constants to ASPEED_DEV_*, to avoid conflicts. Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Tested-By: Roman Bolshakov <r.bolshakov@yadro.com> Message-Id: <20200825192110.3528606-7-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
This commit is contained in:
Eduardo Habkost
parent
4af44e1eca
commit
347df6f876
4 changed files with 266 additions and 266 deletions
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@ -27,97 +27,97 @@
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#define ASPEED_SOC_IOMEM_SIZE 0x00200000
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static const hwaddr aspeed_soc_ast2400_memmap[] = {
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[ASPEED_IOMEM] = 0x1E600000,
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[ASPEED_FMC] = 0x1E620000,
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[ASPEED_SPI1] = 0x1E630000,
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[ASPEED_EHCI1] = 0x1E6A1000,
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[ASPEED_VIC] = 0x1E6C0000,
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[ASPEED_SDMC] = 0x1E6E0000,
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[ASPEED_SCU] = 0x1E6E2000,
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[ASPEED_XDMA] = 0x1E6E7000,
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[ASPEED_VIDEO] = 0x1E700000,
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[ASPEED_ADC] = 0x1E6E9000,
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[ASPEED_SRAM] = 0x1E720000,
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[ASPEED_SDHCI] = 0x1E740000,
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[ASPEED_GPIO] = 0x1E780000,
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[ASPEED_RTC] = 0x1E781000,
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[ASPEED_TIMER1] = 0x1E782000,
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[ASPEED_WDT] = 0x1E785000,
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[ASPEED_PWM] = 0x1E786000,
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[ASPEED_LPC] = 0x1E789000,
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[ASPEED_IBT] = 0x1E789140,
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[ASPEED_I2C] = 0x1E78A000,
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[ASPEED_ETH1] = 0x1E660000,
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[ASPEED_ETH2] = 0x1E680000,
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[ASPEED_UART1] = 0x1E783000,
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[ASPEED_UART5] = 0x1E784000,
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[ASPEED_VUART] = 0x1E787000,
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[ASPEED_SDRAM] = 0x40000000,
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[ASPEED_DEV_IOMEM] = 0x1E600000,
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[ASPEED_DEV_FMC] = 0x1E620000,
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[ASPEED_DEV_SPI1] = 0x1E630000,
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[ASPEED_DEV_EHCI1] = 0x1E6A1000,
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[ASPEED_DEV_VIC] = 0x1E6C0000,
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[ASPEED_DEV_SDMC] = 0x1E6E0000,
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[ASPEED_DEV_SCU] = 0x1E6E2000,
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[ASPEED_DEV_XDMA] = 0x1E6E7000,
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[ASPEED_DEV_VIDEO] = 0x1E700000,
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[ASPEED_DEV_ADC] = 0x1E6E9000,
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[ASPEED_DEV_SRAM] = 0x1E720000,
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[ASPEED_DEV_SDHCI] = 0x1E740000,
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[ASPEED_DEV_GPIO] = 0x1E780000,
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[ASPEED_DEV_RTC] = 0x1E781000,
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[ASPEED_DEV_TIMER1] = 0x1E782000,
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[ASPEED_DEV_WDT] = 0x1E785000,
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[ASPEED_DEV_PWM] = 0x1E786000,
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[ASPEED_DEV_LPC] = 0x1E789000,
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[ASPEED_DEV_IBT] = 0x1E789140,
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[ASPEED_DEV_I2C] = 0x1E78A000,
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[ASPEED_DEV_ETH1] = 0x1E660000,
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[ASPEED_DEV_ETH2] = 0x1E680000,
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[ASPEED_DEV_UART1] = 0x1E783000,
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[ASPEED_DEV_UART5] = 0x1E784000,
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[ASPEED_DEV_VUART] = 0x1E787000,
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[ASPEED_DEV_SDRAM] = 0x40000000,
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};
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static const hwaddr aspeed_soc_ast2500_memmap[] = {
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[ASPEED_IOMEM] = 0x1E600000,
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[ASPEED_FMC] = 0x1E620000,
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[ASPEED_SPI1] = 0x1E630000,
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[ASPEED_SPI2] = 0x1E631000,
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[ASPEED_EHCI1] = 0x1E6A1000,
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[ASPEED_EHCI2] = 0x1E6A3000,
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[ASPEED_VIC] = 0x1E6C0000,
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[ASPEED_SDMC] = 0x1E6E0000,
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[ASPEED_SCU] = 0x1E6E2000,
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[ASPEED_XDMA] = 0x1E6E7000,
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[ASPEED_ADC] = 0x1E6E9000,
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[ASPEED_VIDEO] = 0x1E700000,
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[ASPEED_SRAM] = 0x1E720000,
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[ASPEED_SDHCI] = 0x1E740000,
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[ASPEED_GPIO] = 0x1E780000,
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[ASPEED_RTC] = 0x1E781000,
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[ASPEED_TIMER1] = 0x1E782000,
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[ASPEED_WDT] = 0x1E785000,
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[ASPEED_PWM] = 0x1E786000,
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[ASPEED_LPC] = 0x1E789000,
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[ASPEED_IBT] = 0x1E789140,
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[ASPEED_I2C] = 0x1E78A000,
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[ASPEED_ETH1] = 0x1E660000,
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[ASPEED_ETH2] = 0x1E680000,
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[ASPEED_UART1] = 0x1E783000,
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[ASPEED_UART5] = 0x1E784000,
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[ASPEED_VUART] = 0x1E787000,
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[ASPEED_SDRAM] = 0x80000000,
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[ASPEED_DEV_IOMEM] = 0x1E600000,
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[ASPEED_DEV_FMC] = 0x1E620000,
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[ASPEED_DEV_SPI1] = 0x1E630000,
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[ASPEED_DEV_SPI2] = 0x1E631000,
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[ASPEED_DEV_EHCI1] = 0x1E6A1000,
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[ASPEED_DEV_EHCI2] = 0x1E6A3000,
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[ASPEED_DEV_VIC] = 0x1E6C0000,
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[ASPEED_DEV_SDMC] = 0x1E6E0000,
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[ASPEED_DEV_SCU] = 0x1E6E2000,
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[ASPEED_DEV_XDMA] = 0x1E6E7000,
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[ASPEED_DEV_ADC] = 0x1E6E9000,
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[ASPEED_DEV_VIDEO] = 0x1E700000,
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[ASPEED_DEV_SRAM] = 0x1E720000,
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[ASPEED_DEV_SDHCI] = 0x1E740000,
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[ASPEED_DEV_GPIO] = 0x1E780000,
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[ASPEED_DEV_RTC] = 0x1E781000,
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[ASPEED_DEV_TIMER1] = 0x1E782000,
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[ASPEED_DEV_WDT] = 0x1E785000,
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[ASPEED_DEV_PWM] = 0x1E786000,
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[ASPEED_DEV_LPC] = 0x1E789000,
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[ASPEED_DEV_IBT] = 0x1E789140,
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[ASPEED_DEV_I2C] = 0x1E78A000,
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[ASPEED_DEV_ETH1] = 0x1E660000,
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[ASPEED_DEV_ETH2] = 0x1E680000,
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[ASPEED_DEV_UART1] = 0x1E783000,
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[ASPEED_DEV_UART5] = 0x1E784000,
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[ASPEED_DEV_VUART] = 0x1E787000,
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[ASPEED_DEV_SDRAM] = 0x80000000,
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};
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static const int aspeed_soc_ast2400_irqmap[] = {
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[ASPEED_UART1] = 9,
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[ASPEED_UART2] = 32,
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[ASPEED_UART3] = 33,
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[ASPEED_UART4] = 34,
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[ASPEED_UART5] = 10,
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[ASPEED_VUART] = 8,
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[ASPEED_FMC] = 19,
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[ASPEED_EHCI1] = 5,
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[ASPEED_EHCI2] = 13,
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[ASPEED_SDMC] = 0,
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[ASPEED_SCU] = 21,
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[ASPEED_ADC] = 31,
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[ASPEED_GPIO] = 20,
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[ASPEED_RTC] = 22,
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[ASPEED_TIMER1] = 16,
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[ASPEED_TIMER2] = 17,
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[ASPEED_TIMER3] = 18,
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[ASPEED_TIMER4] = 35,
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[ASPEED_TIMER5] = 36,
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[ASPEED_TIMER6] = 37,
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[ASPEED_TIMER7] = 38,
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[ASPEED_TIMER8] = 39,
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[ASPEED_WDT] = 27,
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[ASPEED_PWM] = 28,
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[ASPEED_LPC] = 8,
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[ASPEED_IBT] = 8, /* LPC */
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[ASPEED_I2C] = 12,
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[ASPEED_ETH1] = 2,
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[ASPEED_ETH2] = 3,
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[ASPEED_XDMA] = 6,
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[ASPEED_SDHCI] = 26,
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[ASPEED_DEV_UART1] = 9,
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[ASPEED_DEV_UART2] = 32,
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[ASPEED_DEV_UART3] = 33,
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[ASPEED_DEV_UART4] = 34,
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[ASPEED_DEV_UART5] = 10,
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[ASPEED_DEV_VUART] = 8,
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[ASPEED_DEV_FMC] = 19,
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[ASPEED_DEV_EHCI1] = 5,
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[ASPEED_DEV_EHCI2] = 13,
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[ASPEED_DEV_SDMC] = 0,
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[ASPEED_DEV_SCU] = 21,
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[ASPEED_DEV_ADC] = 31,
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[ASPEED_DEV_GPIO] = 20,
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[ASPEED_DEV_RTC] = 22,
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[ASPEED_DEV_TIMER1] = 16,
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[ASPEED_DEV_TIMER2] = 17,
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[ASPEED_DEV_TIMER3] = 18,
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[ASPEED_DEV_TIMER4] = 35,
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[ASPEED_DEV_TIMER5] = 36,
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[ASPEED_DEV_TIMER6] = 37,
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[ASPEED_DEV_TIMER7] = 38,
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[ASPEED_DEV_TIMER8] = 39,
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[ASPEED_DEV_WDT] = 27,
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[ASPEED_DEV_PWM] = 28,
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[ASPEED_DEV_LPC] = 8,
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[ASPEED_DEV_IBT] = 8, /* LPC */
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[ASPEED_DEV_I2C] = 12,
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[ASPEED_DEV_ETH1] = 2,
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[ASPEED_DEV_ETH2] = 3,
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[ASPEED_DEV_XDMA] = 6,
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[ASPEED_DEV_SDHCI] = 26,
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};
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#define aspeed_soc_ast2500_irqmap aspeed_soc_ast2400_irqmap
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@ -221,11 +221,11 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
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Error *err = NULL;
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/* IO space */
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create_unimplemented_device("aspeed_soc.io", sc->memmap[ASPEED_IOMEM],
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create_unimplemented_device("aspeed_soc.io", sc->memmap[ASPEED_DEV_IOMEM],
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ASPEED_SOC_IOMEM_SIZE);
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/* Video engine stub */
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create_unimplemented_device("aspeed.video", sc->memmap[ASPEED_VIDEO],
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create_unimplemented_device("aspeed.video", sc->memmap[ASPEED_DEV_VIDEO],
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0x1000);
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/* CPU */
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@ -243,19 +243,19 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
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return;
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}
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memory_region_add_subregion(get_system_memory(),
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sc->memmap[ASPEED_SRAM], &s->sram);
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sc->memmap[ASPEED_DEV_SRAM], &s->sram);
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/* SCU */
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) {
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_SCU]);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->scu), 0, sc->memmap[ASPEED_DEV_SCU]);
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/* VIC */
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->vic), errp)) {
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->vic), 0, sc->memmap[ASPEED_VIC]);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->vic), 0, sc->memmap[ASPEED_DEV_VIC]);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->vic), 0,
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qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->vic), 1,
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@ -265,9 +265,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->rtc), errp)) {
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_RTC]);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, sc->memmap[ASPEED_DEV_RTC]);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0,
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aspeed_soc_get_irq(s, ASPEED_RTC));
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aspeed_soc_get_irq(s, ASPEED_DEV_RTC));
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/* Timer */
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object_property_set_link(OBJECT(&s->timerctrl), "scu", OBJECT(&s->scu),
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@ -276,16 +276,16 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->timerctrl), 0,
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sc->memmap[ASPEED_TIMER1]);
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sc->memmap[ASPEED_DEV_TIMER1]);
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for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) {
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qemu_irq irq = aspeed_soc_get_irq(s, ASPEED_TIMER1 + i);
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qemu_irq irq = aspeed_soc_get_irq(s, ASPEED_DEV_TIMER1 + i);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->timerctrl), i, irq);
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}
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/* UART - attach an 8250 to the IO space as our UART5 */
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if (serial_hd(0)) {
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qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_UART5);
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serial_mm_init(get_system_memory(), sc->memmap[ASPEED_UART5], 2,
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qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5);
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serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
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uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
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}
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@ -295,25 +295,25 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->i2c), errp)) {
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_I2C]);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c), 0, sc->memmap[ASPEED_DEV_I2C]);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c), 0,
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aspeed_soc_get_irq(s, ASPEED_I2C));
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aspeed_soc_get_irq(s, ASPEED_DEV_I2C));
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/* FMC, The number of CS is set at the board level */
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object_property_set_link(OBJECT(&s->fmc), "dram", OBJECT(s->dram_mr),
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&error_abort);
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if (!object_property_set_int(OBJECT(&s->fmc), "sdram-base",
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sc->memmap[ASPEED_SDRAM], errp)) {
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sc->memmap[ASPEED_DEV_SDRAM], errp)) {
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return;
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}
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->fmc), errp)) {
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_FMC]);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 0, sc->memmap[ASPEED_DEV_FMC]);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->fmc), 1,
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s->fmc.ctrl->flash_window_base);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->fmc), 0,
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aspeed_soc_get_irq(s, ASPEED_FMC));
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aspeed_soc_get_irq(s, ASPEED_DEV_FMC));
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/* SPI */
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for (i = 0; i < sc->spis_num; i++) {
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@ -322,7 +322,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0,
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sc->memmap[ASPEED_SPI1 + i]);
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sc->memmap[ASPEED_DEV_SPI1 + i]);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 1,
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s->spi[i].ctrl->flash_window_base);
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}
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@ -333,16 +333,16 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0,
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sc->memmap[ASPEED_EHCI1 + i]);
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sc->memmap[ASPEED_DEV_EHCI1 + i]);
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0,
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aspeed_soc_get_irq(s, ASPEED_EHCI1 + i));
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aspeed_soc_get_irq(s, ASPEED_DEV_EHCI1 + i));
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}
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/* SDMC - SDRAM Memory Controller */
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if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdmc), errp)) {
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdmc), 0, sc->memmap[ASPEED_SDMC]);
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdmc), 0, sc->memmap[ASPEED_DEV_SDMC]);
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/* Watch dog */
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for (i = 0; i < sc->wdts_num; i++) {
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@ -354,7 +354,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
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return;
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}
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sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0,
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sc->memmap[ASPEED_WDT] + i * awc->offset);
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sc->memmap[ASPEED_DEV_WDT] + i * awc->offset);
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}
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/* Net */
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@ -365,9 +365,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
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return;
|
||||
}
|
||||
sysbus_mmio_map(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
|
||||
sc->memmap[ASPEED_ETH1 + i]);
|
||||
sc->memmap[ASPEED_DEV_ETH1 + i]);
|
||||
sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100[i]), 0,
|
||||
aspeed_soc_get_irq(s, ASPEED_ETH1 + i));
|
||||
aspeed_soc_get_irq(s, ASPEED_DEV_ETH1 + i));
|
||||
}
|
||||
|
||||
/* XDMA */
|
||||
|
|
@ -375,26 +375,26 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
|
|||
return;
|
||||
}
|
||||
sysbus_mmio_map(SYS_BUS_DEVICE(&s->xdma), 0,
|
||||
sc->memmap[ASPEED_XDMA]);
|
||||
sc->memmap[ASPEED_DEV_XDMA]);
|
||||
sysbus_connect_irq(SYS_BUS_DEVICE(&s->xdma), 0,
|
||||
aspeed_soc_get_irq(s, ASPEED_XDMA));
|
||||
aspeed_soc_get_irq(s, ASPEED_DEV_XDMA));
|
||||
|
||||
/* GPIO */
|
||||
if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) {
|
||||
return;
|
||||
}
|
||||
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, sc->memmap[ASPEED_GPIO]);
|
||||
sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, sc->memmap[ASPEED_DEV_GPIO]);
|
||||
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0,
|
||||
aspeed_soc_get_irq(s, ASPEED_GPIO));
|
||||
aspeed_soc_get_irq(s, ASPEED_DEV_GPIO));
|
||||
|
||||
/* SDHCI */
|
||||
if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), errp)) {
|
||||
return;
|
||||
}
|
||||
sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdhci), 0,
|
||||
sc->memmap[ASPEED_SDHCI]);
|
||||
sc->memmap[ASPEED_DEV_SDHCI]);
|
||||
sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
|
||||
aspeed_soc_get_irq(s, ASPEED_SDHCI));
|
||||
aspeed_soc_get_irq(s, ASPEED_DEV_SDHCI));
|
||||
}
|
||||
static Property aspeed_soc_properties[] = {
|
||||
DEFINE_PROP_LINK("dram", AspeedSoCState, dram_mr, TYPE_MEMORY_REGION,
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue