target/arm: Implement SVE2 WHILEGT, WHILEGE, WHILEHI, WHILEHS

Rename the existing sve_while (less-than) helper to sve_whilel
to make room for a new sve_whileg helper for greater-than.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210525010358.152808-31-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2021-05-24 18:02:56 -07:00 committed by Peter Maydell
parent 743bb14773
commit 34688dbc1c
4 changed files with 82 additions and 17 deletions

View file

@ -3750,7 +3750,7 @@ uint64_t HELPER(sve_cntp)(void *vn, void *vg, uint32_t pred_desc)
return sum;
}
uint32_t HELPER(sve_while)(void *vd, uint32_t count, uint32_t pred_desc)
uint32_t HELPER(sve_whilel)(void *vd, uint32_t count, uint32_t pred_desc)
{
intptr_t oprsz = FIELD_EX32(pred_desc, PREDDESC, OPRSZ);
intptr_t esz = FIELD_EX32(pred_desc, PREDDESC, ESZ);
@ -3776,6 +3776,42 @@ uint32_t HELPER(sve_while)(void *vd, uint32_t count, uint32_t pred_desc)
return predtest_ones(d, oprsz, esz_mask);
}
uint32_t HELPER(sve_whileg)(void *vd, uint32_t count, uint32_t pred_desc)
{
intptr_t oprsz = FIELD_EX32(pred_desc, PREDDESC, OPRSZ);
intptr_t esz = FIELD_EX32(pred_desc, PREDDESC, ESZ);
uint64_t esz_mask = pred_esz_masks[esz];
ARMPredicateReg *d = vd;
intptr_t i, invcount, oprbits;
uint64_t bits;
if (count == 0) {
return do_zero(d, oprsz);
}
oprbits = oprsz * 8;
tcg_debug_assert(count <= oprbits);
bits = esz_mask;
if (oprbits & 63) {
bits &= MAKE_64BIT_MASK(0, oprbits & 63);
}
invcount = oprbits - count;
for (i = (oprsz - 1) / 8; i > invcount / 64; --i) {
d->p[i] = bits;
bits = esz_mask;
}
d->p[i] = bits & MAKE_64BIT_MASK(invcount & 63, 64);
while (--i >= 0) {
d->p[i] = 0;
}
return predtest_ones(d, oprsz, esz_mask);
}
/* Recursive reduction on a function;
* C.f. the ARM ARM function ReducePredicated.
*