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i386/cpu: Don't enumerate the "invalid" CPU topology level

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In the follow-up change, the CPU topology enumeration will be moved to
QAPI. And considerring "invalid" should not be exposed to QAPI as an
unsettable item, so, as a preparation for future changes, remove
"invalid" level from the current CPU topology enumeration structure
and define it by a macro instead.

Due to the removal of the enumeration of "invalid", bit 0 of
CPUX86State.avail_cpu_topo bitmap will no longer correspond to "invalid"
level, but will start at the SMT level. Therefore, to honor this change,
update the encoding rule for CPUID[0x1F].

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-ID: <20241101083331.340178-2-zhao1.liu@intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Zhao Liu 2024-11-01 16:33:23 +08:00 • committed by Philippe Mathieu-Daudé
parent 6e64c8ef8c
commit 34230ce5a9
2 changed files with 10 additions and 6 deletions
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3
include/hw/i386/topology.h
View file

@ -62,6 +62,8 @@ typedef struct X86CPUTopoInfo {
unsigned threads_per_core;
} X86CPUTopoInfo;
#define CPU_TOPO_LEVEL_INVALID CPU_TOPO_LEVEL_MAX
/*
* CPUTopoLevel is the general i386 topology hierarchical representation,
* ordered by increasing hierarchical relationship.
@ -69,7 +71,6 @@ typedef struct X86CPUTopoInfo {
* or AMD (CPUID[0x80000026]).
*/
enum CPUTopoLevel {
CPU_TOPO_LEVEL_INVALID,
CPU_TOPO_LEVEL_SMT,
CPU_TOPO_LEVEL_CORE,
CPU_TOPO_LEVEL_MODULE,