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hw/gpio/aspeed: Fix coding style

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Fix coding style issues from checkpatch.pl

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
This commit is contained in:
Jamin Lin 2024-10-01 10:43:27 +08:00 • committed by Cédric Le Goater
parent 6f625ce2f2
commit 33343bff71
2 changed files with 4 additions and 4 deletions
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6
hw/gpio/aspeed_gpio.c
View file

@ -340,7 +340,8 @@ static void aspeed_gpio_set_pin_level(AspeedGPIOState *s, uint32_t set_idx,
value &= ~pin_mask; value &= ~pin_mask;
} }
aspeed_gpio_update(s, &s->sets[set_idx], value, ~s->sets[set_idx].direction); aspeed_gpio_update(s, &s->sets[set_idx], value,
~s->sets[set_idx].direction);
} }
/* /*
@ -629,7 +630,6 @@ static uint64_t aspeed_gpio_read(void *opaque, hwaddr offset, uint32_t size)
static void aspeed_gpio_write_index_mode(void *opaque, hwaddr offset, static void aspeed_gpio_write_index_mode(void *opaque, hwaddr offset,
uint64_t data, uint32_t size) uint64_t data, uint32_t size)
{ {
AspeedGPIOState *s = ASPEED_GPIO(opaque); AspeedGPIOState *s = ASPEED_GPIO(opaque);
AspeedGPIOClass *agc = ASPEED_GPIO_GET_CLASS(s); AspeedGPIOClass *agc = ASPEED_GPIO_GET_CLASS(s);
const GPIOSetProperties *props; const GPIOSetProperties *props;
@ -963,7 +963,7 @@ static void aspeed_gpio_set_pin(Object *obj, Visitor *v, const char *name,
aspeed_gpio_set_pin_level(s, set_idx, pin, level); aspeed_gpio_set_pin_level(s, set_idx, pin, level);
} }
/****************** Setup functions ******************/ /* Setup functions */
static const GPIOSetProperties ast2400_set_props[ASPEED_GPIO_MAX_NR_SETS] = { static const GPIOSetProperties ast2400_set_props[ASPEED_GPIO_MAX_NR_SETS] = {
[0] = {0xffffffff, 0xffffffff, {"A", "B", "C", "D"} }, [0] = {0xffffffff, 0xffffffff, {"A", "B", "C", "D"} },
[1] = {0xffffffff, 0xffffffff, {"E", "F", "G", "H"} }, [1] = {0xffffffff, 0xffffffff, {"E", "F", "G", "H"} },

2
include/hw/gpio/aspeed_gpio.h
View file

@ -88,7 +88,7 @@ struct AspeedGPIOState {
qemu_irq irq; qemu_irq irq;
qemu_irq gpios[ASPEED_GPIO_MAX_NR_SETS][ASPEED_GPIOS_PER_SET]; qemu_irq gpios[ASPEED_GPIO_MAX_NR_SETS][ASPEED_GPIOS_PER_SET];
/* Parallel GPIO Registers */ /* Parallel GPIO Registers */
uint32_t debounce_regs[ASPEED_GPIO_NR_DEBOUNCE_REGS]; uint32_t debounce_regs[ASPEED_GPIO_NR_DEBOUNCE_REGS];
struct GPIOSets { struct GPIOSets {
uint32_t data_value; /* Reflects pin values */ uint32_t data_value; /* Reflects pin values */