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hw/arm/smmuv3: Cache/invalidate config data
Let's cache config data to avoid fetching and parsing STE/CD structures on each translation. We invalidate them on data structure invalidation commands. We put in place a per-smmu mutex to protect the config cache. This will be useful too to protect the IOTLB cache. The caches can be accessed without BQL, ie. in IO dataplane. The same kind of mutex was put in place in the intel viommu. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1529653501-15358-3-git-send-email-eric.auger@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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5 changed files with 164 additions and 7 deletions
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@ -75,6 +75,8 @@ typedef struct SMMUDevice {
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int devfn;
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IOMMUMemoryRegion iommu;
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AddressSpace as;
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uint32_t cfg_cache_hits;
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uint32_t cfg_cache_misses;
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} SMMUDevice;
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typedef struct SMMUNotifierNode {
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@ -142,4 +144,7 @@ int smmu_ptw(SMMUTransCfg *cfg, dma_addr_t iova, IOMMUAccessFlags perm,
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*/
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SMMUTransTableInfo *select_tt(SMMUTransCfg *cfg, dma_addr_t iova);
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/* Return the iommu mr associated to @sid, or NULL if none */
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IOMMUMemoryRegion *smmu_iommu_mr(SMMUState *s, uint32_t sid);
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#endif /* HW_ARM_SMMU_COMMON */
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@ -59,6 +59,7 @@ typedef struct SMMUv3State {
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SMMUQueue eventq, cmdq;
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qemu_irq irq[4];
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QemuMutex mutex;
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} SMMUv3State;
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typedef enum {
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