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Fix Sparc32 interrupt handling

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3110 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1 2007-08-04 10:50:30 +00:00
parent ccf1d14a1e
commit 327ac2e797
4 changed files with 55 additions and 44 deletions
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4
target-sparc/cpu.h
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@ -181,7 +181,8 @@ typedef struct CPUSPARCState {
int psrs; /* supervisor mode (extracted from PSR) */
int psrps; /* previous supervisor mode */
int psret; /* enable traps */
uint32_t psrpil; /* interrupt level */
uint32_t psrpil; /* interrupt blocking level */
uint32_t pil_in; /* incoming interrupt level bitmap */
int psref; /* enable fpu */
target_ulong version;
jmp_buf jmp_env;
@ -306,6 +307,7 @@ void do_unassigned_access(target_phys_addr_t addr, int is_write, int is_exec,
void do_tick_set_count(void *opaque, uint64_t count);
uint64_t do_tick_get_count(void *opaque);
void do_tick_set_limit(void *opaque, uint64_t limit);
void cpu_check_irqs(CPUSPARCState *env);
#define CPUState CPUSPARCState
#define cpu_init cpu_sparc_init