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https://github.com/Motorhead1991/qemu.git
synced 2025-08-09 02:24:58 -06:00
m48t59: let init functions return a Nvram object
Remove left-overs from header file. Move some functions only used by PReP to hw/ppc/prep.c Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> CC: Andreas Färber <afaerber@suse.de> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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parent
4374532888
commit
3168824682
6 changed files with 177 additions and 231 deletions
161
hw/ppc/prep.c
161
hw/ppc/prep.c
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@ -181,7 +181,7 @@ static const MemoryRegionOps PPC_XCSR_ops = {
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/* Fake super-io ports for PREP platform (Intel 82378ZB) */
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typedef struct sysctrl_t {
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qemu_irq reset_irq;
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M48t59State *nvram;
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Nvram *nvram;
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uint8_t state;
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uint8_t syscontrol;
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int contiguous_map;
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@ -235,13 +235,17 @@ static void PREP_io_800_writeb (void *opaque, uint32_t addr, uint32_t val)
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break;
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case 0x0810:
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/* Password protect 1 register */
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if (sysctrl->nvram != NULL)
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m48t59_toggle_lock(sysctrl->nvram, 1);
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if (sysctrl->nvram != NULL) {
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NvramClass *k = NVRAM_GET_CLASS(sysctrl->nvram);
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(k->toggle_lock)(sysctrl->nvram, 1);
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}
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break;
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case 0x0812:
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/* Password protect 2 register */
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if (sysctrl->nvram != NULL)
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m48t59_toggle_lock(sysctrl->nvram, 2);
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if (sysctrl->nvram != NULL) {
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NvramClass *k = NVRAM_GET_CLASS(sysctrl->nvram);
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(k->toggle_lock)(sysctrl->nvram, 2);
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}
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break;
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case 0x0814:
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/* L2 invalidate register */
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@ -360,6 +364,144 @@ static const MemoryRegionPortio prep_portio_list[] = {
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static PortioList prep_port_list;
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/*****************************************************************************/
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/* NVRAM helpers */
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static inline uint32_t nvram_read(Nvram *nvram, uint32_t addr)
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{
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NvramClass *k = NVRAM_GET_CLASS(sysctrl->nvram);
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return (k->read)(nvram, addr);
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}
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static inline void nvram_write(Nvram *nvram, uint32_t addr, uint32_t val)
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{
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NvramClass *k = NVRAM_GET_CLASS(sysctrl->nvram);
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(k->write)(nvram, addr, val);
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}
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static void NVRAM_set_byte(Nvram *nvram, uint32_t addr, uint8_t value)
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{
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nvram_write(nvram, addr, value);
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}
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static uint8_t NVRAM_get_byte(Nvram *nvram, uint32_t addr)
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{
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return nvram_read(nvram, addr);
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}
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static void NVRAM_set_word(Nvram *nvram, uint32_t addr, uint16_t value)
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{
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nvram_write(nvram, addr, value >> 8);
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nvram_write(nvram, addr + 1, value & 0xFF);
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}
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static uint16_t NVRAM_get_word(Nvram *nvram, uint32_t addr)
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{
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uint16_t tmp;
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tmp = nvram_read(nvram, addr) << 8;
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tmp |= nvram_read(nvram, addr + 1);
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return tmp;
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}
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static void NVRAM_set_lword(Nvram *nvram, uint32_t addr, uint32_t value)
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{
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nvram_write(nvram, addr, value >> 24);
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nvram_write(nvram, addr + 1, (value >> 16) & 0xFF);
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nvram_write(nvram, addr + 2, (value >> 8) & 0xFF);
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nvram_write(nvram, addr + 3, value & 0xFF);
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}
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static void NVRAM_set_string(Nvram *nvram, uint32_t addr, const char *str,
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uint32_t max)
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{
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int i;
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for (i = 0; i < max && str[i] != '\0'; i++) {
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nvram_write(nvram, addr + i, str[i]);
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}
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nvram_write(nvram, addr + i, str[i]);
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nvram_write(nvram, addr + max - 1, '\0');
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}
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static uint16_t NVRAM_crc_update (uint16_t prev, uint16_t value)
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{
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uint16_t tmp;
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uint16_t pd, pd1, pd2;
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tmp = prev >> 8;
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pd = prev ^ value;
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pd1 = pd & 0x000F;
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pd2 = ((pd >> 4) & 0x000F) ^ pd1;
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tmp ^= (pd1 << 3) | (pd1 << 8);
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tmp ^= pd2 | (pd2 << 7) | (pd2 << 12);
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return tmp;
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}
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static uint16_t NVRAM_compute_crc (Nvram *nvram, uint32_t start, uint32_t count)
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{
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uint32_t i;
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uint16_t crc = 0xFFFF;
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int odd;
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odd = count & 1;
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count &= ~1;
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for (i = 0; i != count; i++) {
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crc = NVRAM_crc_update(crc, NVRAM_get_word(nvram, start + i));
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}
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if (odd) {
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crc = NVRAM_crc_update(crc, NVRAM_get_byte(nvram, start + i) << 8);
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}
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return crc;
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}
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#define CMDLINE_ADDR 0x017ff000
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static int PPC_NVRAM_set_params (Nvram *nvram, uint16_t NVRAM_size,
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const char *arch,
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uint32_t RAM_size, int boot_device,
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uint32_t kernel_image, uint32_t kernel_size,
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const char *cmdline,
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uint32_t initrd_image, uint32_t initrd_size,
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uint32_t NVRAM_image,
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int width, int height, int depth)
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{
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uint16_t crc;
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/* Set parameters for Open Hack'Ware BIOS */
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NVRAM_set_string(nvram, 0x00, "QEMU_BIOS", 16);
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NVRAM_set_lword(nvram, 0x10, 0x00000002); /* structure v2 */
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NVRAM_set_word(nvram, 0x14, NVRAM_size);
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NVRAM_set_string(nvram, 0x20, arch, 16);
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NVRAM_set_lword(nvram, 0x30, RAM_size);
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NVRAM_set_byte(nvram, 0x34, boot_device);
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NVRAM_set_lword(nvram, 0x38, kernel_image);
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NVRAM_set_lword(nvram, 0x3C, kernel_size);
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if (cmdline) {
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/* XXX: put the cmdline in NVRAM too ? */
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pstrcpy_targphys("cmdline", CMDLINE_ADDR, RAM_size - CMDLINE_ADDR,
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cmdline);
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NVRAM_set_lword(nvram, 0x40, CMDLINE_ADDR);
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NVRAM_set_lword(nvram, 0x44, strlen(cmdline));
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} else {
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NVRAM_set_lword(nvram, 0x40, 0);
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NVRAM_set_lword(nvram, 0x44, 0);
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}
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NVRAM_set_lword(nvram, 0x48, initrd_image);
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NVRAM_set_lword(nvram, 0x4C, initrd_size);
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NVRAM_set_lword(nvram, 0x50, NVRAM_image);
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NVRAM_set_word(nvram, 0x54, width);
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NVRAM_set_word(nvram, 0x56, height);
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NVRAM_set_word(nvram, 0x58, depth);
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crc = NVRAM_compute_crc(nvram, 0x00, 0xF8);
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NVRAM_set_word(nvram, 0xFC, crc);
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return 0;
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}
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/* PowerPC PREP hardware initialisation */
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static void ppc_prep_init(MachineState *machine)
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{
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@ -372,8 +514,7 @@ static void ppc_prep_init(MachineState *machine)
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MemoryRegion *sysmem = get_system_memory();
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PowerPCCPU *cpu = NULL;
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CPUPPCState *env = NULL;
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nvram_t nvram;
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M48t59State *m48t59;
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Nvram *m48t59;
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#if 0
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MemoryRegion *xcsr = g_new(MemoryRegion, 1);
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#endif
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@ -549,10 +690,8 @@ static void ppc_prep_init(MachineState *machine)
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sysctrl->nvram = m48t59;
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/* Initialise NVRAM */
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nvram.opaque = m48t59;
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nvram.read_fn = &m48t59_read;
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nvram.write_fn = &m48t59_write;
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PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "PREP", ram_size, ppc_boot_device,
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PPC_NVRAM_set_params(m48t59, NVRAM_SIZE, "PREP", ram_size,
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ppc_boot_device,
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kernel_base, kernel_size,
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kernel_cmdline,
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initrd_base, initrd_size,
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