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target/arm: Fix syndrome for FGT traps on ERET

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In commit 442c9d682c when we converted the ERET, ERETAA, ERETAB
instructions to decodetree, the conversion accidentally lost the
correct setting of the syndrome register when taking a trap because
of the FEAT_FGT HFGITR_EL1.ERET bit.  Instead of reporting a correct
full syndrome value with the EC and IL bits, we only reported the low
two bits of the syndrome, because the call to syn_erettrap() got
dropped.

Fix the syndrome values for these traps by reinstating the
syn_erettrap() calls.

Fixes: 442c9d682c ("target/arm: Convert ERET, ERETAA, ERETAB to decodetree")
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20231024172438.2990945-1-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2023-10-24 18:24:38 +01:00
parent 1036ce4e6a
commit 307521d6e2
1 changed files with 2 additions and 2 deletions
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4
target/arm/tcg/translate-a64.c
View file

@ -1606,7 +1606,7 @@ static bool trans_ERET(DisasContext *s, arg_ERET *a)
return false;
}
if (s->fgt_eret) {
gen_exception_insn_el(s, 0, EXCP_UDEF, 0, 2);
gen_exception_insn_el(s, 0, EXCP_UDEF, syn_erettrap(0), 2);
return true;
}
dst = tcg_temp_new_i64();
@ -1633,7 +1633,7 @@ static bool trans_ERETA(DisasContext *s, arg_reta *a)
}
/* The FGT trap takes precedence over an auth trap. */
if (s->fgt_eret) {
gen_exception_insn_el(s, 0, EXCP_UDEF, a->m ? 3 : 2, 2);
gen_exception_insn_el(s, 0, EXCP_UDEF, syn_erettrap(a->m ? 3 : 2), 2);
return true;
}
dst = tcg_temp_new_i64();