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target/arm: Use env_cpu, env_archcpu
Cleanup in the boilerplate that each target must define. Replace arm_env_get_cpu with env_archcpu. The combination CPU(arm_env_get_cpu) should have used ENV_GET_CPU to begin; use env_cpu now. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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1c7ad26000
commit
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13 changed files with 88 additions and 94 deletions
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@ -73,7 +73,7 @@
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/* AArch64 main loop */
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void cpu_loop(CPUARMState *env)
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{
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CPUState *cs = CPU(arm_env_get_cpu(env));
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CPUState *cs = env_cpu(env);
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int trapnr;
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abi_long ret;
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target_siginfo_t info;
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@ -150,8 +150,8 @@ void cpu_loop(CPUARMState *env)
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void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
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{
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ARMCPU *cpu = arm_env_get_cpu(env);
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CPUState *cs = CPU(cpu);
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ARMCPU *cpu = env_archcpu(env);
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CPUState *cs = env_cpu(env);
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TaskState *ts = cs->opaque;
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struct image_info *info = ts->info;
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int i;
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@ -314,7 +314,7 @@ static int target_restore_sigframe(CPUARMState *env,
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break;
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case TARGET_SVE_MAGIC:
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if (cpu_isar_feature(aa64_sve, arm_env_get_cpu(env))) {
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if (cpu_isar_feature(aa64_sve, env_archcpu(env))) {
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vq = (env->vfp.zcr_el[1] & 0xf) + 1;
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sve_size = QEMU_ALIGN_UP(TARGET_SVE_SIG_CONTEXT_SIZE(vq), 16);
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if (!sve && size == sve_size) {
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@ -433,7 +433,7 @@ static void target_setup_frame(int usig, struct target_sigaction *ka,
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&layout);
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/* SVE state needs saving only if it exists. */
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if (cpu_isar_feature(aa64_sve, arm_env_get_cpu(env))) {
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if (cpu_isar_feature(aa64_sve, env_archcpu(env))) {
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vq = (env->vfp.zcr_el[1] & 0xf) + 1;
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sve_size = QEMU_ALIGN_UP(TARGET_SVE_SIG_CONTEXT_SIZE(vq), 16);
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sve_ofs = alloc_sigframe_space(sve_size, &layout);
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@ -206,7 +206,7 @@ do_kernel_trap(CPUARMState *env)
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void cpu_loop(CPUARMState *env)
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{
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CPUState *cs = CPU(arm_env_get_cpu(env));
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CPUState *cs = env_cpu(env);
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int trapnr;
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unsigned int n, insn;
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target_siginfo_t info;
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@ -9781,10 +9781,10 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1,
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* even though the current architectural maximum is VQ=16.
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*/
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ret = -TARGET_EINVAL;
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if (cpu_isar_feature(aa64_sve, arm_env_get_cpu(cpu_env))
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if (cpu_isar_feature(aa64_sve, env_archcpu(cpu_env))
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&& arg2 >= 0 && arg2 <= 512 * 16 && !(arg2 & 15)) {
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CPUARMState *env = cpu_env;
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ARMCPU *cpu = arm_env_get_cpu(env);
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ARMCPU *cpu = env_archcpu(env);
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uint32_t vq, old_vq;
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old_vq = (env->vfp.zcr_el[1] & 0xf) + 1;
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@ -9801,7 +9801,7 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1,
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case TARGET_PR_SVE_GET_VL:
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ret = -TARGET_EINVAL;
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{
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ARMCPU *cpu = arm_env_get_cpu(cpu_env);
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ARMCPU *cpu = env_archcpu(cpu_env);
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if (cpu_isar_feature(aa64_sve, cpu)) {
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ret = ((cpu->env.vfp.zcr_el[1] & 0xf) + 1) * 16;
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}
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@ -9810,7 +9810,7 @@ static abi_long do_syscall1(void *cpu_env, int num, abi_long arg1,
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case TARGET_PR_PAC_RESET_KEYS:
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{
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CPUARMState *env = cpu_env;
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ARMCPU *cpu = arm_env_get_cpu(env);
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ARMCPU *cpu = env_archcpu(env);
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if (arg3 || arg4 || arg5) {
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return -TARGET_EINVAL;
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