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target/m68k: add fsglmul and fsgldiv
fsglmul and fsgldiv truncate data to single precision before computing results. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170628204241.32106-6-laurent@vivier.eu>
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3 changed files with 36 additions and 0 deletions
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@ -253,6 +253,20 @@ void HELPER(fdmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
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PREC_END();
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}
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void HELPER(fsglmul)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
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{
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int rounding_mode = get_float_rounding_mode(&env->fp_status);
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floatx80 a, b;
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PREC_BEGIN(32);
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set_float_rounding_mode(float_round_to_zero, &env->fp_status);
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a = floatx80_round(val0->d, &env->fp_status);
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b = floatx80_round(val1->d, &env->fp_status);
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set_float_rounding_mode(rounding_mode, &env->fp_status);
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res->d = floatx80_mul(a, b, &env->fp_status);
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PREC_END();
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}
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void HELPER(fdiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
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{
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res->d = floatx80_div(val1->d, val0->d, &env->fp_status);
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@ -272,6 +286,20 @@ void HELPER(fddiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
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PREC_END();
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}
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void HELPER(fsgldiv)(CPUM68KState *env, FPReg *res, FPReg *val0, FPReg *val1)
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{
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int rounding_mode = get_float_rounding_mode(&env->fp_status);
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floatx80 a, b;
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PREC_BEGIN(32);
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set_float_rounding_mode(float_round_to_zero, &env->fp_status);
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a = floatx80_round(val1->d, &env->fp_status);
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b = floatx80_round(val0->d, &env->fp_status);
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set_float_rounding_mode(rounding_mode, &env->fp_status);
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res->d = floatx80_div(a, b, &env->fp_status);
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PREC_END();
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}
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static int float_comp_to_cc(int float_compare)
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{
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switch (float_compare) {
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