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virtio,pci: features, cleanups
vdpa:
shadow vq vlan support
net migration with cvq
cxl:
support emulating 4 HDM decoders
serial number extended capability
virtio:
hared dma-buf
Fixes, cleanups all over the place.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pci: features, cleanups
vdpa:
shadow vq vlan support
net migration with cvq
cxl:
support emulating 4 HDM decoders
serial number extended capability
virtio:
hared dma-buf
Fixes, cleanups all over the place.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (53 commits)
libvhost-user: handle shared_object msg
vhost-user: add shared_object msg
hw/display: introduce virtio-dmabuf
util/uuid: add a hash function
virtio: remove unused next argument from virtqueue_split_read_next_desc()
virtio: remove unnecessary thread fence while reading next descriptor
virtio: use shadow_avail_idx while checking number of heads
libvhost-user.c: add assertion to vu_message_read_default
pcie_sriov: unregister_vfs(): fix error path
hw/i386/pc: improve physical address space bound check for 32-bit x86 systems
amd_iommu: Fix APIC address check
vdpa net: follow VirtIO initialization properly at cvq isolation probing
vdpa net: stop probing if cannot set features
vdpa net: fix error message setting virtio status
hw/pci-bridge/cxl-upstream: Add serial number extended capability support
hw/cxl: Support 4 HDM decoders at all levels of topology
hw/cxl: Fix and use same calculation for HDM decoder block size everywhere
hw/cxl: Add utility functions decoder interleave ways and target count.
hw/cxl: Push cxl_decoder_count_enc() and cxl_decode_ig() into .c
vdpa net: zero vhost_vdpa iova_tree pointer at cleanup
...
Conflicts:
hw/core/machine.c
Context conflict with commit 314e0a84cd
("hw/core: remove needless
includes") because it removed an adjacent #include.
This commit is contained in:
commit
2f3913f4b2
71 changed files with 2025 additions and 450 deletions
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@ -1,12 +1,6 @@
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#include "qemu/osdep.h"
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#include "hw/i386/pc.h"
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#include "hw/i386/acpi-build.h"
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void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids,
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GArray *entry, bool force_enabled)
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{
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}
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Object *acpi_get_i386_pci_host(void)
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{
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return NULL;
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@ -32,6 +32,7 @@
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#include "qemu/module.h"
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#include "qemu/option.h"
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#include "sysemu/runstate.h"
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#include "trace.h"
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struct acpi_table_header {
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uint16_t _length; /* our length, not actual part of the hdr */
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@ -688,9 +689,11 @@ void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val)
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cur = acpi_gpe_ioport_get_ptr(ar, addr);
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if (addr < ar->gpe.len / 2) {
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trace_acpi_gpe_sts_ioport_writeb(addr, val);
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/* GPE_STS */
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*cur = (*cur) & ~val;
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} else if (addr < ar->gpe.len) {
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trace_acpi_gpe_en_ioport_writeb(addr - (ar->gpe.len / 2), val);
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/* GPE_EN */
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*cur = val;
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} else {
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@ -709,6 +712,12 @@ uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr)
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val = *cur;
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}
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if (addr < ar->gpe.len / 2) {
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trace_acpi_gpe_sts_ioport_readb(addr, val);
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} else {
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trace_acpi_gpe_en_ioport_readb(addr - (ar->gpe.len / 2), val);
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}
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return val;
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}
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@ -1,6 +1,7 @@
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#include "qemu/osdep.h"
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#include "migration/vmstate.h"
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#include "hw/acpi/cpu.h"
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#include "hw/core/cpu.h"
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#include "qapi/error.h"
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#include "qapi/qapi-events-acpi.h"
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#include "trace.h"
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@ -338,7 +339,7 @@ const VMStateDescription vmstate_cpu_hotplug = {
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#define CPU_FW_EJECT_EVENT "CEJF"
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void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
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hwaddr io_base,
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build_madt_cpu_fn build_madt_cpu, hwaddr io_base,
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const char *res_root,
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const char *event_handler_method)
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{
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
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char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root);
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Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL);
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AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj);
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cpu_ctrl_dev = aml_device("%s", cphp_res_path);
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{
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aml_append(dev, method);
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/* build _MAT object */
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assert(adevc && adevc->madt_cpu);
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adevc->madt_cpu(i, arch_ids, madt_buf,
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true); /* set enabled flag */
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build_madt_cpu(i, arch_ids, madt_buf, true); /* set enabled flag */
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aml_append(dev, aml_name_decl("_MAT",
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aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data)));
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g_array_free(madt_buf, true);
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@ -27,6 +27,7 @@
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#include "qemu/osdep.h"
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#include "qemu/units.h"
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#include "sysemu/numa.h"
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#include "hw/acpi/aml-build.h"
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#include "hw/acpi/hmat.h"
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/*
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#ifndef HMAT_H
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#define HMAT_H
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#include "hw/acpi/aml-build.h"
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#include "hw/acpi/bios-linker-loader.h"
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#include "sysemu/numa.h"
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/*
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* ACPI 6.3: 5.2.27.3 Memory Proximity Domain Attributes Structure,
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@ -1,6 +1,7 @@
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#include "qemu/osdep.h"
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#include "hw/acpi/memory_hotplug.h"
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#include "hw/mem/pc-dimm.h"
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#include "hw/boards.h"
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#include "hw/qdev-core.h"
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#include "migration/vmstate.h"
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#include "trace.h"
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@ -20,7 +20,6 @@
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*/
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#include "qemu/osdep.h"
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#include "hw/i386/pc.h"
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#include "hw/irq.h"
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#include "hw/isa/apm.h"
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#include "hw/i2c/pm_smbus.h"
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#include "hw/acpi/acpi_dev_interface.h"
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#include "migration/vmstate.h"
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#include "hw/core/cpu.h"
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#include "trace.h"
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#include "qom/object.h"
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#define GPE_BASE 0xafe0
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PIIX4PMState *s = opaque;
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uint32_t val = acpi_gpe_ioport_readb(&s->ar, addr);
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trace_piix4_gpe_readb(addr, width, val);
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return val;
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}
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{
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PIIX4PMState *s = opaque;
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trace_piix4_gpe_writeb(addr, width, val);
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acpi_gpe_ioport_writeb(&s->ar, addr, val);
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acpi_update_sci(&s->ar, s->irq);
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}
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hc->is_hotpluggable_bus = piix4_is_hotpluggable_bus;
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adevc->ospm_status = piix4_ospm_status;
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adevc->send_event = piix4_send_gpe;
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adevc->madt_cpu = pc_madt_cpu_entry;
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}
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static const TypeInfo piix4_pm_info = {
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@ -17,6 +17,12 @@ mhp_acpi_clear_remove_evt(uint32_t slot) "slot[0x%"PRIx32"] clear remove event"
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mhp_acpi_pc_dimm_deleted(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm deleted"
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mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm delete failed"
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# core.c
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acpi_gpe_en_ioport_readb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " ==> 0x%02" PRIx8
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acpi_gpe_en_ioport_writeb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " <== 0x%02" PRIx8
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acpi_gpe_sts_ioport_readb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " ==> 0x%02" PRIx8
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acpi_gpe_sts_ioport_writeb(uint32_t addr, uint8_t val) "addr: 0x%" PRIx32 " <== 0x%02" PRIx8
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# cpu.c
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cpuhp_acpi_invalid_idx_selected(uint32_t idx) "0x%"PRIx32
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cpuhp_acpi_read_flags(uint32_t idx, uint8_t flags) "idx[0x%"PRIx32"] flags: 0x%"PRIx8
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acpi_pci_ej_write(uint64_t addr, uint64_t data) "0x%" PRIx64 " <== %" PRIu64
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acpi_pci_sel_write(uint64_t addr, uint64_t data) "0x%" PRIx64 " <== %" PRIu64
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# piix4.c
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piix4_gpe_readb(uint64_t addr, unsigned width, uint64_t val) "addr: 0x%" PRIx64 " width: %d ==> 0x%" PRIx64
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piix4_gpe_writeb(uint64_t addr, unsigned width, uint64_t val) "addr: 0x%" PRIx64 " width: %d <== 0x%" PRIx64
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# tco.c
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tco_timer_reload(int ticks, int msec) "ticks=%d (%d ms)"
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tco_timer_expired(int timeouts_no, bool strap, bool no_reboot) "timeouts_no=%d no_reboot=%d/%d"
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